ACEC/test.v
2022-10-23 17:29:18 +08:00

133 lines
5.6 KiB
Coq

module top( x0 , x1 , x2 , x3 , x4 , x5 , x6 , x7 , x8 , x9 , x10 , x11 , x12 , x13 , y0 );
input x0 , x1 , x2 , x3 , x4 , x5 , x6 , x7 , x8 , x9 , x10 , x11 , x12 , x13 ;
output y0 ;
wire n15 , n16 , n17 , n18 , n19 , n20 , n21 , n22 , n23 , n24 , n25 , n26 , n27 , n28 , n29 , n30 , n31 , n32 , n33 , n34 , n35 , n36 , n37 , n38 , n39 , n40 , n41 , n42 , n43 , n44 , n45 , n46 , n47 , n48 , n49 , n50 , n51 , n52 , n53 , n54 , n55 , n56 , n57 , n58 , n59 , n60 , n61 , n62 , n63 , n64 , n65 , n66 , n67 , n68 , n69 , n70 , n71 , n72 , n73 , n74 , n75 , n76 , n77 , n78 , n79 , n80 , n81 , n82 , n83 , n84 , n85 , n86 , n87 , n88 , n89 , n90 , n91 , n92 , n93 , n94 , n95 , n96 , n97 , n98 , n99 , n100 , n101 , n102 , n103 , n104 , n105 , n106 , n107 , n108 , n109 , n110 , n111 , n112 , n113 , n114 , n115 , n116 , n117 , n118 , n119 , n120 , n121 , n122 , n123 , n124 , n125 , n126 , n127 , n128 , n129 , n130 , n131 , n132 , n133 , n134 , n135 , n136 , n137 , n138 , n139 , n140 ;
assign n39 = x5 & x11 ;
assign n38 = x1 & x6 ;
assign n40 = n39 ^ n38 ^ 1'b0 ;
assign n60 = x11 & x13 ;
assign n61 = n38 & n60 ;
assign n68 = x0 & x10 ;
assign n59 = x9 & x13 ;
assign n121 = n68 ^ n59 ^ 1'b0 ;
assign n69 = x3 & x4 ;
assign n122 = n121 ^ n69 ^ 1'b0 ;
assign n123 = ( n40 & n61 ) | ( n40 & n122 ) | ( n61 & n122 ) ;
assign n35 = x6 & x11 ;
assign n36 = x1 & x5 ;
assign n37 = n35 & n36 ;
assign n19 = x5 & x6 ;
assign n18 = x8 & x11 ;
assign n21 = n19 ^ n18 ^ 1'b0 ;
assign n108 = n37 ^ n21 ^ 1'b0 ;
assign n44 = x0 & x3 ;
assign n109 = n108 ^ n44 ^ 1'b0 ;
assign n45 = x2 & x10 ;
assign n34 = x1 & x9 ;
assign n106 = n45 ^ n34 ^ 1'b0 ;
assign n46 = x4 & x13 ;
assign n107 = n106 ^ n46 ^ 1'b0 ;
assign n124 = n109 ^ n107 ^ 1'b0 ;
assign n105 = ( n59 & n68 ) | ( n59 & n69 ) | ( n68 & n69 ) ;
assign n125 = n124 ^ n105 ^ 1'b0 ;
assign n73 = x4 & x10 ;
assign n82 = x3 & x9 ;
assign n84 = x3 & x6 ;
assign n126 = x9 & x10 ;
assign n127 = n84 & n126 ;
assign n128 = ( n73 & n82 ) | ( n73 & n127 ) | ( n82 & n127 ) ;
assign n129 = n122 ^ n61 ^ 1'b0 ;
assign n130 = n129 ^ n40 ^ 1'b0 ;
assign n63 = x6 & x13 ;
assign n62 = x1 & x11 ;
assign n64 = n63 ^ n62 ^ 1'b0 ;
assign n94 = x10 & x11 ;
assign n95 = n84 & n94 ;
assign n132 = n126 ^ n84 ^ 1'b0 ;
assign n133 = ( n60 & n95 ) | ( n60 & n132 ) | ( n95 & n132 ) ;
assign n131 = n82 ^ n73 ^ 1'b0 ;
assign n134 = n131 ^ n127 ^ 1'b0 ;
assign n135 = ( n64 & n133 ) | ( n64 & n134 ) | ( n133 & n134 ) ;
assign n136 = ( n128 & n130 ) | ( n128 & n135 ) | ( n130 & n135 ) ;
assign n137 = ( n123 & n125 ) | ( n123 & n136 ) | ( n125 & n136 ) ;
assign n119 = ( n105 & n107 ) | ( n105 & n109 ) | ( n107 & n109 ) ;
assign n53 = x7 & x10 ;
assign n25 = x5 & x9 ;
assign n113 = n53 ^ n25 ^ 1'b0 ;
assign n111 = ( n34 & n45 ) | ( n34 & n46 ) | ( n45 & n46 ) ;
assign n16 = x6 & x8 ;
assign n15 = x11 & x12 ;
assign n17 = n16 ^ n15 ^ 1'b0 ;
assign n112 = n111 ^ n17 ^ 1'b0 ;
assign n114 = n113 ^ n112 ^ 1'b0 ;
assign n31 = x2 & x3 ;
assign n115 = n114 ^ n31 ^ 1'b0 ;
assign n20 = n18 & n19 ;
assign n117 = n115 ^ n20 ^ 1'b0 ;
assign n110 = ( n21 & n37 ) | ( n21 & n44 ) | ( n37 & n44 ) ;
assign n29 = x1 & x4 ;
assign n28 = x0 & x13 ;
assign n30 = n29 ^ n28 ^ 1'b0 ;
assign n116 = n110 ^ n30 ^ 1'b0 ;
assign n118 = n117 ^ n116 ^ 1'b0 ;
assign n120 = n119 ^ n118 ^ 1'b0 ;
assign n138 = n137 ^ n120 ^ 1'b0 ;
assign n83 = n82 ^ n64 ^ 1'b0 ;
assign n85 = n60 & n84 ;
assign n87 = x10 | n85 ;
assign n86 = n84 ^ n60 ^ 1'b0 ;
assign n88 = ( x9 & ~x10 ) | ( x9 & n86 ) | ( ~x10 & n86 ) ;
assign n89 = ( n85 & n87 ) | ( n85 & n88 ) | ( n87 & n88 ) ;
assign n90 = ( n73 & n83 ) | ( n73 & n89 ) | ( n83 & n89 ) ;
assign n70 = n69 ^ n68 ^ 1'b0 ;
assign n80 = n70 ^ n59 ^ 1'b0 ;
assign n65 = x9 | n61 ;
assign n66 = ( x3 & ~x9 ) | ( x3 & n64 ) | ( ~x9 & n64 ) ;
assign n67 = ( n61 & n65 ) | ( n61 & n66 ) | ( n65 & n66 ) ;
assign n79 = n67 ^ n40 ^ 1'b0 ;
assign n81 = n80 ^ n79 ^ 1'b0 ;
assign n102 = n90 ^ n81 ^ 1'b0 ;
assign n74 = n44 & n73 ;
assign n71 = n59 ^ n40 ^ 1'b0 ;
assign n72 = ( n67 & n70 ) | ( n67 & n71 ) | ( n70 & n71 ) ;
assign n77 = n74 ^ n72 ^ 1'b0 ;
assign n47 = n45 ^ n44 ^ 1'b0 ;
assign n48 = n47 ^ n46 ^ 1'b0 ;
assign n57 = n48 ^ n34 ^ 1'b0 ;
assign n41 = x13 | n37 ;
assign n42 = ( x9 & ~x13 ) | ( x9 & n40 ) | ( ~x13 & n40 ) ;
assign n43 = ( n37 & n41 ) | ( n37 & n42 ) | ( n41 & n42 ) ;
assign n56 = n43 ^ n21 ^ 1'b0 ;
assign n58 = n57 ^ n56 ^ 1'b0 ;
assign n78 = n77 ^ n58 ^ 1'b0 ;
assign n96 = ( x9 & x10 ) | ( x9 & ~n95 ) | ( x10 & ~n95 ) ;
assign n97 = n96 ^ n86 ^ 1'b0 ;
assign n98 = n95 & n97 ;
assign n99 = n89 ^ n73 ^ 1'b0 ;
assign n100 = n99 ^ n83 ^ 1'b0 ;
assign n101 = n98 & n100 ;
assign n103 = n78 & n101 ;
assign n104 = n102 & n103 ;
assign n139 = n138 ^ n104 ^ 1'b0 ;
assign n91 = ( ~n78 & n81 ) | ( ~n78 & n90 ) | ( n81 & n90 ) ;
assign n92 = n78 & n91 ;
assign n75 = ( n58 & n72 ) | ( n58 & n74 ) | ( n72 & n74 ) ;
assign n52 = ( n44 & n45 ) | ( n44 & n46 ) | ( n45 & n46 ) ;
assign n49 = n34 ^ n21 ^ 1'b0 ;
assign n50 = ( n43 & n48 ) | ( n43 & n49 ) | ( n48 & n49 ) ;
assign n22 = x9 | n20 ;
assign n23 = ( x1 & ~x9 ) | ( x1 & n21 ) | ( ~x9 & n21 ) ;
assign n24 = ( n20 & n22 ) | ( n20 & n23 ) | ( n22 & n23 ) ;
assign n26 = n24 ^ n17 ^ 1'b0 ;
assign n27 = n26 ^ n25 ^ 1'b0 ;
assign n32 = n30 ^ n27 ^ 1'b0 ;
assign n33 = n32 ^ n31 ^ 1'b0 ;
assign n51 = n50 ^ n33 ^ 1'b0 ;
assign n54 = n52 ^ n51 ^ 1'b0 ;
assign n55 = n54 ^ n53 ^ 1'b0 ;
assign n76 = n75 ^ n55 ^ 1'b0 ;
assign n93 = n92 ^ n76 ^ 1'b0 ;
assign n140 = n139 ^ n93 ^ 1'b0 ;
assign y0 = n140 ;
endmodule