atpg-ls/exp_result/ATPG-LS_c880.bench.txt

make: 'atpg' is up to date.
========================
parsing file ./benchmark/c880.bench ... Done.
====== Circuit Statistics ====== 
PI:	60
PO:	26
Gate:	443
Stem:	165
Level:	6
================================ 
[SOL] flip: 0, stem: 0, fault:2949. flip_cnt: 0, stem_cnt: 165, fault_cnt:256
coverage: 28.894%	pattern: 1	before: 886	now: 630
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:2909. flip_cnt: 0, stem_cnt: 165, fault_cnt:319
coverage: 56.321%	pattern: 2	before: 630	now: 387
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:738. flip_cnt: 0, stem_cnt: 165, fault_cnt:231
coverage: 64.447%	pattern: 3	before: 387	now: 315
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:1090. flip_cnt: 0, stem_cnt: 165, fault_cnt:288
coverage: 73.589%	pattern: 4	before: 315	now: 234
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:453. flip_cnt: 0, stem_cnt: 165, fault_cnt:272
coverage: 78.217%	pattern: 5	before: 234	now: 193
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:680. flip_cnt: 0, stem_cnt: 165, fault_cnt:293
coverage: 82.957%	pattern: 6	before: 193	now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 165, fault_cnt:175
coverage: 83.521%	pattern: 7	before: 151	now: 146
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:34. flip_cnt: 0, stem_cnt: 165, fault_cnt:216
coverage: 83.973%	pattern: 8	before: 146	now: 142
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 165, fault_cnt:265
coverage: 86.230%	pattern: 9	before: 142	now: 122
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:197. flip_cnt: 0, stem_cnt: 165, fault_cnt:250
coverage: 87.810%	pattern: 10	before: 122	now: 108
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:266
coverage: 87.923%	pattern: 11	before: 108	now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:283
coverage: 87.923%	pattern: 11	before: 107	now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 165, fault_cnt:246
coverage: 88.488%	pattern: 12	before: 107	now: 102
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:248
coverage: 88.713%	pattern: 13	before: 102	now: 100
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 165, fault_cnt:244
coverage: 89.278%	pattern: 14	before: 100	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:170
coverage: 89.391%	pattern: 15	before: 95	now: 94
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:237. flip_cnt: 0, stem_cnt: 165, fault_cnt:254
coverage: 90.858%	pattern: 16	before: 94	now: 81
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:183. flip_cnt: 0, stem_cnt: 165, fault_cnt:204
coverage: 93.002%	pattern: 17	before: 81	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:102. flip_cnt: 0, stem_cnt: 165, fault_cnt:284
coverage: 94.018%	pattern: 18	before: 62	now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:137. flip_cnt: 0, stem_cnt: 165, fault_cnt:212
coverage: 95.372%	pattern: 19	before: 53	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:259
coverage: 95.598%	pattern: 20	before: 41	now: 39
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:18. flip_cnt: 0, stem_cnt: 165, fault_cnt:202
coverage: 96.388%	pattern: 21	before: 39	now: 32
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:5. flip_cnt: 0, stem_cnt: 165, fault_cnt:218
coverage: 96.614%	pattern: 22	before: 32	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:268
coverage: 96.727%	pattern: 23	before: 30	now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:40. flip_cnt: 0, stem_cnt: 165, fault_cnt:318
coverage: 97.178%	pattern: 24	before: 29	now: 25
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:50. flip_cnt: 0, stem_cnt: 165, fault_cnt:186
coverage: 97.743%	pattern: 25	before: 25	now: 20
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 165, fault_cnt:224
coverage: 98.081%	pattern: 26	before: 20	now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:255
coverage: 98.307%	pattern: 27	before: 17	now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:8. flip_cnt: 0, stem_cnt: 165, fault_cnt:246
coverage: 98.420%	pattern: 28	before: 15	now: 14
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216
coverage: 98.420%	pattern: 28	before: 14	now: 14
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:234
coverage: 98.533%	pattern: 29	before: 14	now: 13
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220
coverage: 98.533%	pattern: 29	before: 13	now: 13
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:254
coverage: 98.533%	pattern: 29	before: 13	now: 13
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:34. flip_cnt: 0, stem_cnt: 165, fault_cnt:212
coverage: 98.758%	pattern: 30	before: 13	now: 11
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253
coverage: 98.758%	pattern: 30	before: 11	now: 11
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:274
coverage: 98.758%	pattern: 30	before: 11	now: 11
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:267
coverage: 98.984%	pattern: 31	before: 11	now: 9
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241
coverage: 98.984%	pattern: 31	before: 9	now: 9
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238
coverage: 98.984%	pattern: 31	before: 9	now: 9
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:197
coverage: 98.984%	pattern: 31	before: 9	now: 9
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216
coverage: 98.984%	pattern: 31	before: 9	now: 9
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239
coverage: 98.984%	pattern: 31	before: 9	now: 9
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:268
coverage: 99.210%	pattern: 32	before: 9	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:313
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:330
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:200
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:182
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:272
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:255
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:260
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:340
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:163
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:310
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:272
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:265
coverage: 99.210%	pattern: 32	before: 7	now: 7
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:229
coverage: 99.323%	pattern: 33	before: 7	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:251
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:259
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:288
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:301
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:240
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:180
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:270
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:209
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:283
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:189
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:188
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:205
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:185
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:259
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:256
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:200
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246
coverage: 99.323%	pattern: 33	before: 6	now: 6
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 165, fault_cnt:198
coverage: 99.436%	pattern: 34	before: 6	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:162
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:285
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:167
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:278
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:274
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:287
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:264
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:259
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257
coverage: 99.436%	pattern: 34	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:285
coverage: 99.549%	pattern: 35	before: 5	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:262
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:264
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:274
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:327
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:205
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:195
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:286
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:268
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:200
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:172
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:251
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:304
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:172
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:293
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:164
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:195
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:254
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:205
coverage: 99.549%	pattern: 35	before: 4	now: 4
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:33. flip_cnt: 0, stem_cnt: 165, fault_cnt:270
coverage: 99.774%	pattern: 36	before: 4	now: 2
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:15. flip_cnt: 0, stem_cnt: 165, fault_cnt:295
coverage: 99.887%	pattern: 37	before: 2	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:245
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:282
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:182
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:203
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:210
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:222
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:185
coverage: 99.887%	pattern: 37	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:16. flip_cnt: 0, stem_cnt: 165, fault_cnt:229
coverage: 100.000%	pattern: 38	before: 1	now: 0
checking valid circuit ... result: 1.

real	0m13.726s
user	0m13.723s
sys	0m0.000s