make: 'atpg' is up to date.
========================
parsing file ./benchmark/b13.bench ... Done.
====== Circuit Statistics ====== 
PI:	63
PO:	63
Gate:	322
Stem:	187
Level:	3
================================ 
[SOL] flip: 0, stem: 0, fault:4104. flip_cnt: 0, stem_cnt: 187, fault_cnt:216
coverage: 33.540%	pattern: 1	before: 644	now: 428
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:2470. flip_cnt: 0, stem_cnt: 187, fault_cnt:221
coverage: 53.727%	pattern: 2	before: 428	now: 298
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:1140. flip_cnt: 0, stem_cnt: 187, fault_cnt:218
coverage: 63.043%	pattern: 3	before: 298	now: 238
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:570. flip_cnt: 0, stem_cnt: 187, fault_cnt:207
coverage: 67.702%	pattern: 4	before: 238	now: 208
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 187, fault_cnt:211
coverage: 70.031%	pattern: 5	before: 208	now: 193
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 187, fault_cnt:219
coverage: 71.739%	pattern: 6	before: 193	now: 182
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 187, fault_cnt:209
coverage: 72.360%	pattern: 7	before: 182	now: 178
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 187, fault_cnt:233
coverage: 74.068%	pattern: 8	before: 178	now: 167
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 75.932%	pattern: 9	before: 167	now: 155
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 187, fault_cnt:222
coverage: 78.261%	pattern: 10	before: 155	now: 140
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 187, fault_cnt:221
coverage: 78.571%	pattern: 11	before: 140	now: 138
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:213
coverage: 78.571%	pattern: 11	before: 138	now: 138
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 79.814%	pattern: 12	before: 138	now: 130
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 187, fault_cnt:220
coverage: 80.590%	pattern: 13	before: 130	now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 187, fault_cnt:226
coverage: 81.832%	pattern: 14	before: 125	now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221
coverage: 81.832%	pattern: 14	before: 117	now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215
coverage: 81.832%	pattern: 14	before: 117	now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 187, fault_cnt:223
coverage: 83.385%	pattern: 15	before: 117	now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222
coverage: 83.385%	pattern: 15	before: 107	now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 187, fault_cnt:234
coverage: 84.317%	pattern: 16	before: 107	now: 101
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 187, fault_cnt:218
coverage: 85.093%	pattern: 17	before: 101	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 85.248%	pattern: 18	before: 96	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229
coverage: 85.248%	pattern: 18	before: 95	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:235
coverage: 85.248%	pattern: 18	before: 95	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 187, fault_cnt:229
coverage: 85.714%	pattern: 19	before: 95	now: 92
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216
coverage: 85.714%	pattern: 19	before: 92	now: 92
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228
coverage: 85.714%	pattern: 19	before: 92	now: 92
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219
coverage: 85.714%	pattern: 19	before: 92	now: 92
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212
coverage: 85.714%	pattern: 19	before: 92	now: 92
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 187, fault_cnt:225
coverage: 86.646%	pattern: 20	before: 92	now: 86
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221
coverage: 86.646%	pattern: 20	before: 86	now: 86
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226
coverage: 86.646%	pattern: 20	before: 86	now: 86
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 86.646%	pattern: 20	before: 86	now: 86
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219
coverage: 86.646%	pattern: 20	before: 86	now: 86
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:228
coverage: 86.646%	pattern: 20	before: 86	now: 86
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218
coverage: 86.646%	pattern: 20	before: 86	now: 86
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:513. flip_cnt: 0, stem_cnt: 187, fault_cnt:243
coverage: 90.839%	pattern: 21	before: 86	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222
coverage: 90.839%	pattern: 21	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226
coverage: 90.839%	pattern: 21	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221
coverage: 90.839%	pattern: 21	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 187, fault_cnt:224
coverage: 91.770%	pattern: 22	before: 59	now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:211
coverage: 91.925%	pattern: 23	before: 53	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:231
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:227
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222
coverage: 91.925%	pattern: 23	before: 52	now: 52
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:25. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 92.702%	pattern: 24	before: 52	now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218
coverage: 92.702%	pattern: 24	before: 47	now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214
coverage: 92.702%	pattern: 24	before: 47	now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 92.702%	pattern: 24	before: 47	now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214
coverage: 92.702%	pattern: 24	before: 47	now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:223
coverage: 92.857%	pattern: 25	before: 47	now: 46
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:208
coverage: 92.857%	pattern: 25	before: 46	now: 46
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223
coverage: 92.857%	pattern: 25	before: 46	now: 46
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:1. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 93.012%	pattern: 26	before: 46	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221
coverage: 93.012%	pattern: 26	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223
coverage: 93.012%	pattern: 26	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223
coverage: 93.012%	pattern: 26	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224
coverage: 93.012%	pattern: 26	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230
coverage: 93.012%	pattern: 26	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223
coverage: 93.012%	pattern: 26	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224
coverage: 93.012%	pattern: 26	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224
coverage: 93.012%	pattern: 26	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:204
coverage: 93.168%	pattern: 27	before: 45	now: 44
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:214
coverage: 93.323%	pattern: 28	before: 44	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 187, fault_cnt:223
coverage: 93.789%	pattern: 29	before: 43	now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215
coverage: 93.789%	pattern: 29	before: 40	now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:36. flip_cnt: 0, stem_cnt: 187, fault_cnt:219
coverage: 94.099%	pattern: 30	before: 40	now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:230
coverage: 94.255%	pattern: 31	before: 38	now: 37
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225
coverage: 94.255%	pattern: 31	before: 37	now: 37
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:221
coverage: 94.410%	pattern: 32	before: 37	now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219
coverage: 94.410%	pattern: 32	before: 36	now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220
coverage: 94.410%	pattern: 32	before: 36	now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214
coverage: 94.410%	pattern: 32	before: 36	now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:223
coverage: 94.410%	pattern: 32	before: 36	now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220
coverage: 94.410%	pattern: 32	before: 36	now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230
coverage: 94.410%	pattern: 32	before: 36	now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220
coverage: 94.410%	pattern: 32	before: 36	now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225
coverage: 94.410%	pattern: 32	before: 36	now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 187, fault_cnt:249
coverage: 95.186%	pattern: 33	before: 36	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:218
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:222
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:224
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:214
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:204
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:216
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:225
coverage: 95.186%	pattern: 33	before: 31	now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 187, fault_cnt:210
coverage: 95.342%	pattern: 34	before: 31	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:220
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:219
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:230
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:229
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:221
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:215
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:212
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:226
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 187, fault_cnt:217
coverage: 95.342%	pattern: 34	before: 30	now: 30
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 187, fault_cnt:222
coverage: 95.652%	pattern: 35	before: 30	now: 28
checking valid circuit ... result: 1.