make: 'atpg' is up to date. ======================== parsing file ./benchmark/c880.bench ... Done. ====== Circuit Statistics ====== PI: 60 PO: 26 Gate: 443 Stem: 165 Level: 6 ================================ [SOL] flip: 0, stem: 0, fault:5605. flip_cnt: 0, stem_cnt: 165, fault_cnt:295 coverage: 33.296% pattern: 1 before: 886 now: 591 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:3325. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 53.047% pattern: 2 before: 591 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1520. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 62.077% pattern: 3 before: 416 now: 336 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:2014. flip_cnt: 0, stem_cnt: 165, fault_cnt:298 coverage: 74.041% pattern: 4 before: 336 now: 230 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:418. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 76.524% pattern: 5 before: 230 now: 208 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:565. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 81.151% pattern: 6 before: 208 now: 167 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 82.167% pattern: 7 before: 167 now: 158 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:418. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 84.650% pattern: 8 before: 158 now: 136 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 86.117% pattern: 9 before: 136 now: 123 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 165, fault_cnt:199 coverage: 87.020% pattern: 10 before: 123 now: 115 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 coverage: 87.133% pattern: 11 before: 115 now: 114 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 87.923% pattern: 12 before: 114 now: 107 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 88.939% pattern: 13 before: 107 now: 98 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 165, fault_cnt:259 coverage: 90.519% pattern: 14 before: 98 now: 84 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 165, fault_cnt:261 coverage: 91.986% pattern: 15 before: 84 now: 71 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 92.551% pattern: 16 before: 71 now: 66 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 92.664% pattern: 17 before: 66 now: 65 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 165, fault_cnt:209 coverage: 93.002% pattern: 18 before: 65 now: 62 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:187 coverage: 93.002% pattern: 18 before: 62 now: 62 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 165, fault_cnt:274 coverage: 94.018% pattern: 19 before: 62 now: 53 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:286 coverage: 94.244% pattern: 20 before: 53 now: 51 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:194 coverage: 94.244% pattern: 20 before: 51 now: 51 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:187 coverage: 94.244% pattern: 20 before: 51 now: 51 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 165, fault_cnt:336 coverage: 94.695% pattern: 21 before: 51 now: 47 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 165, fault_cnt:291 coverage: 95.147% pattern: 22 before: 47 now: 43 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 95.485% pattern: 23 before: 43 now: 40 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:192 coverage: 95.711% pattern: 24 before: 40 now: 38 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:284 coverage: 95.937% pattern: 25 before: 38 now: 36 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:271 coverage: 95.937% pattern: 25 before: 36 now: 36 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 96.050% pattern: 26 before: 36 now: 35 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:224 coverage: 96.275% pattern: 27 before: 35 now: 33 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 96.275% pattern: 27 before: 33 now: 33 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 96.840% pattern: 28 before: 33 now: 28 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 96.953% pattern: 29 before: 28 now: 27 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 96.953% pattern: 29 before: 27 now: 27 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 96.953% pattern: 29 before: 27 now: 27 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 coverage: 96.953% pattern: 29 before: 27 now: 27 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 97.178% pattern: 30 before: 27 now: 25 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:191 coverage: 97.178% pattern: 30 before: 25 now: 25 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 97.178% pattern: 30 before: 25 now: 25 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 165, fault_cnt:333 coverage: 97.968% pattern: 31 before: 25 now: 18 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 97.968% pattern: 31 before: 18 now: 18 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:283 coverage: 97.968% pattern: 31 before: 18 now: 18 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 97.968% pattern: 31 before: 18 now: 18 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 97.968% pattern: 31 before: 18 now: 18 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217 coverage: 97.968% pattern: 31 before: 18 now: 18 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252 coverage: 97.968% pattern: 31 before: 18 now: 18 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 coverage: 97.968% pattern: 31 before: 18 now: 18 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:262 coverage: 98.194% pattern: 32 before: 18 now: 16 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:195 coverage: 98.194% pattern: 32 before: 16 now: 16 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 98.307% pattern: 33 before: 16 now: 15 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 98.307% pattern: 33 before: 15 now: 15 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:248 coverage: 98.307% pattern: 33 before: 15 now: 15 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:209 coverage: 98.307% pattern: 33 before: 15 now: 15 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:254 coverage: 98.307% pattern: 33 before: 15 now: 15 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 98.420% pattern: 34 before: 15 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:255 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:194 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:212 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:232 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:159 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:210 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 98.420% pattern: 34 before: 14 now: 14 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:268 coverage: 98.533% pattern: 35 before: 14 now: 13 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 98.533% pattern: 35 before: 13 now: 13 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 98.533% pattern: 35 before: 13 now: 13 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:274 coverage: 98.646% pattern: 36 before: 13 now: 12 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:303 coverage: 98.758% pattern: 37 before: 12 now: 11 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:213 coverage: 98.758% pattern: 37 before: 11 now: 11 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 98.758% pattern: 37 before: 11 now: 11 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 98.758% pattern: 37 before: 11 now: 11 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 98.758% pattern: 37 before: 11 now: 11 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 98.871% pattern: 38 before: 11 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:203 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:205 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:170 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:265 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:193 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:298 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:299 coverage: 98.871% pattern: 38 before: 10 now: 10 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:308 coverage: 98.984% pattern: 39 before: 10 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:222 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:213 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:206 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 98.984% pattern: 39 before: 9 now: 9 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:21. flip_cnt: 0, stem_cnt: 165, fault_cnt:182 coverage: 99.210% pattern: 40 before: 9 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:209 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:184 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:313 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:279 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:258 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:207 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:268 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:260 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:286 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:198 coverage: 99.210% pattern: 40 before: 7 now: 7 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:308 coverage: 99.436% pattern: 41 before: 7 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:254 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:170 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:277 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:251 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:258 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:316 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:199 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:210 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:273 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:240 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:251 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:179 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.436% pattern: 41 before: 5 now: 5 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.661% pattern: 42 before: 5 now: 3 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:190 coverage: 99.661% pattern: 42 before: 3 now: 3 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:203 coverage: 99.661% pattern: 42 before: 3 now: 3 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:185 coverage: 99.661% pattern: 42 before: 3 now: 3 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:291 coverage: 99.661% pattern: 42 before: 3 now: 3 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.661% pattern: 42 before: 3 now: 3 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:283 coverage: 99.661% pattern: 42 before: 3 now: 3 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:13. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 coverage: 99.774% pattern: 43 before: 3 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:292 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:191 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:317 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:282 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:297 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:209 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:224 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:292 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:184 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:212 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:206 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:273 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:204 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:207 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:222 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:206 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:262 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:179 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:302 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:261 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:260 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:167 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:240 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:273 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:212 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:224 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:203 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:224 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:207 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:315 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:280 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:274 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:189 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:254 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:186 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:268 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:278 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:277 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:209 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:284 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:193 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:240 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:169 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:279 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:251 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:203 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:159 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:275 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:194 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:200 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:296 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:232 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:197 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:281 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:193 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:271 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:264 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:204 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:179 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:349 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:265 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:224 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:198 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:282 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:254 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:311 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:188 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:232 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:172 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:173 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:284 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:172 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:280 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 99.774% pattern: 43 before: 2 now: 2 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:274 coverage: 99.887% pattern: 44 before: 2 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:248 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:315 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:265 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:232 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:193 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:192 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:178 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:207 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:284 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:185 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:265 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:306 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:224 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:245 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:206 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:185 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:261 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:232 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:261 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:283 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:188 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:222 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:267 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:287 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:248 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:212 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:248 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:197 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:164 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:255 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:193 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:255 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:196 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:274 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:270 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:196 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:189 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:282 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:261 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:265 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:177 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:200 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:248 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:271 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:258 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:204 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:210 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:193 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:297 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:193 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:277 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:271 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:232 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:199 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:205 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:186 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:232 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:254 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:323 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:267 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:267 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:194 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:279 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:198 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:176 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:173 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:189 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:248 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:166 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:171 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:259 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:197 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:185 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:281 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:195 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:248 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:240 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:240 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:282 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:197 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:282 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:272 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:267 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:272 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:283 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:206 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:166 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:283 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:257 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:300 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:245 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:188 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:262 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:240 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:245 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:248 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:287 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:268 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:308 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:260 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:179 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:248 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:197 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:275 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:251 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:254 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:286 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:278 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:184 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:174 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:270 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:191 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:210 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:262 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:203 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:193 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:161 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:209 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:273 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:281 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:255 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:259 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:206 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:266 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:189 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:272 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:264 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:273 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:197 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:204 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:277 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:264 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:183 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:213 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:222 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:289 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:198 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:261 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:275 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:232 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:217 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:264 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:176 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:213 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:219 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:262 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:238 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:279 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:314 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:192 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:259 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:301 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:260 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:261 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:188 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:277 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:194 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:199 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:188 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:255 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:170 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:191 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:203 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:261 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:205 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:318 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:255 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:258 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:209 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:199 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:247 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:224 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:245 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:213 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:270 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:299 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:202 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:213 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:268 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:282 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:252 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:207 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:211 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:273 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:280 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:232 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:175 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:203 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:190 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:274 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:213 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:262 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:167 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:195 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:209 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:240 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:224 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:267 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:196 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:180 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:241 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:203 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:262 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:207 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:199 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:208 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:249 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:335 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:223 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:195 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:279 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:193 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:191 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:169 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:264 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:163 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:231 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:273 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:263 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:210 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:213 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:230 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:237 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:212 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:192 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:251 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:242 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:227 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:294 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:199 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:222 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:300 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:239 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:312 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:178 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:226 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:228 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:240 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:253 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:243 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:292 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:229 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:165 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:207 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:251 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:218 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:269 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:303 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:250 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:199 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:201 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:276 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:260 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:245 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:278 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:213 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:163 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:281 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:225 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:215 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:258 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:234 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:246 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:216 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:214 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:298 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:221 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:220 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:244 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:236 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 165, fault_cnt:233 coverage: 99.887% pattern: 44 before: 1 now: 1 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 165, fault_cnt:235 coverage: 100.000% pattern: 45 before: 1 now: 0 checking valid circuit ... result: 1. real 7m21.840s user 7m21.806s sys 0m0.012s