make: 'atpg' is up to date.
========================
parsing file ./benchmark/c5315.bench ... Done.
====== Circuit Statistics ====== 
PI:	178
PO:	123
Gate:	2485
Stem:	984
Level:	10
================================ 
[SOL] flip: 0, stem: 0, fault:10765. flip_cnt: 0, stem_cnt: 984, fault_cnt:802
coverage: 16.137%	pattern: 1	before: 4970	now: 4168
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:7281. flip_cnt: 0, stem_cnt: 984, fault_cnt:788
coverage: 24.527%	pattern: 2	before: 4168	now: 3751
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:4076. flip_cnt: 0, stem_cnt: 984, fault_cnt:659
coverage: 29.296%	pattern: 3	before: 3751	now: 3514
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:3188. flip_cnt: 0, stem_cnt: 984, fault_cnt:818
coverage: 34.085%	pattern: 4	before: 3514	now: 3276
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:1372. flip_cnt: 0, stem_cnt: 984, fault_cnt:804
coverage: 35.734%	pattern: 5	before: 3276	now: 3194
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:724. flip_cnt: 0, stem_cnt: 984, fault_cnt:793
coverage: 36.720%	pattern: 6	before: 3194	now: 3145
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:6959. flip_cnt: 0, stem_cnt: 984, fault_cnt:1089
coverage: 44.386%	pattern: 7	before: 3145	now: 2764
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:348. flip_cnt: 0, stem_cnt: 984, fault_cnt:804
coverage: 44.950%	pattern: 8	before: 2764	now: 2736
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:499. flip_cnt: 0, stem_cnt: 984, fault_cnt:779
coverage: 45.594%	pattern: 9	before: 2736	now: 2704
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:3610. flip_cnt: 0, stem_cnt: 984, fault_cnt:928
coverage: 49.416%	pattern: 10	before: 2704	now: 2514
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:9044. flip_cnt: 0, stem_cnt: 984, fault_cnt:1156
coverage: 58.994%	pattern: 11	before: 2514	now: 2038
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 984, fault_cnt:807
coverage: 59.215%	pattern: 12	before: 2038	now: 2027
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 984, fault_cnt:624
coverage: 59.437%	pattern: 13	before: 2027	now: 2016
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:6080. flip_cnt: 0, stem_cnt: 984, fault_cnt:1245
coverage: 65.875%	pattern: 14	before: 2016	now: 1696
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:690
coverage: 65.915%	pattern: 15	before: 1696	now: 1694
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 984, fault_cnt:725
coverage: 66.237%	pattern: 16	before: 1694	now: 1678
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:3382. flip_cnt: 0, stem_cnt: 984, fault_cnt:976
coverage: 69.819%	pattern: 17	before: 1678	now: 1500
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 984, fault_cnt:785
coverage: 70.141%	pattern: 18	before: 1500	now: 1484
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:3781. flip_cnt: 0, stem_cnt: 984, fault_cnt:1218
coverage: 74.145%	pattern: 19	before: 1484	now: 1285
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:1767. flip_cnt: 0, stem_cnt: 984, fault_cnt:1008
coverage: 76.016%	pattern: 20	before: 1285	now: 1192
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 984, fault_cnt:673
coverage: 76.137%	pattern: 21	before: 1192	now: 1186
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 984, fault_cnt:788
coverage: 76.539%	pattern: 22	before: 1186	now: 1166
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:666
coverage: 76.579%	pattern: 23	before: 1166	now: 1164
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:67. flip_cnt: 0, stem_cnt: 984, fault_cnt:641
coverage: 76.660%	pattern: 24	before: 1164	now: 1160
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:806
coverage: 76.720%	pattern: 25	before: 1160	now: 1157
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:788
coverage: 76.781%	pattern: 26	before: 1157	now: 1154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:761
coverage: 76.781%	pattern: 26	before: 1154	now: 1154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769
coverage: 76.781%	pattern: 26	before: 1154	now: 1154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:657
coverage: 76.781%	pattern: 26	before: 1154	now: 1154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:818
coverage: 76.821%	pattern: 27	before: 1154	now: 1152
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 984, fault_cnt:717
coverage: 77.183%	pattern: 28	before: 1152	now: 1134
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 984, fault_cnt:871
coverage: 77.304%	pattern: 29	before: 1134	now: 1128
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 984, fault_cnt:866
coverage: 77.404%	pattern: 30	before: 1128	now: 1123
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:703. flip_cnt: 0, stem_cnt: 984, fault_cnt:944
coverage: 78.149%	pattern: 31	before: 1123	now: 1086
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:2565. flip_cnt: 0, stem_cnt: 984, fault_cnt:1152
coverage: 80.865%	pattern: 32	before: 1086	now: 951
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:741
coverage: 80.865%	pattern: 32	before: 951	now: 951
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 984, fault_cnt:844
coverage: 81.187%	pattern: 33	before: 951	now: 935
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 984, fault_cnt:846
coverage: 81.549%	pattern: 34	before: 935	now: 917
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:755
coverage: 81.610%	pattern: 35	before: 917	now: 914
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704
coverage: 81.610%	pattern: 35	before: 914	now: 914
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:662
coverage: 81.610%	pattern: 35	before: 914	now: 914
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:589. flip_cnt: 0, stem_cnt: 984, fault_cnt:944
coverage: 82.233%	pattern: 36	before: 914	now: 883
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773
coverage: 82.233%	pattern: 36	before: 883	now: 883
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:684. flip_cnt: 0, stem_cnt: 984, fault_cnt:1119
coverage: 82.958%	pattern: 37	before: 883	now: 847
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:816
coverage: 83.038%	pattern: 38	before: 847	now: 843
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 984, fault_cnt:771
coverage: 83.159%	pattern: 39	before: 843	now: 837
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683
coverage: 83.159%	pattern: 39	before: 837	now: 837
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:2584. flip_cnt: 0, stem_cnt: 984, fault_cnt:1160
coverage: 85.895%	pattern: 40	before: 837	now: 701
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:778
coverage: 85.895%	pattern: 40	before: 701	now: 701
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:895
coverage: 85.956%	pattern: 41	before: 701	now: 698
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:687
coverage: 85.956%	pattern: 41	before: 698	now: 698
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:705
coverage: 85.956%	pattern: 41	before: 698	now: 698
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:33. flip_cnt: 0, stem_cnt: 984, fault_cnt:812
coverage: 86.016%	pattern: 42	before: 698	now: 695
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:708
coverage: 86.056%	pattern: 43	before: 695	now: 693
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681
coverage: 86.056%	pattern: 43	before: 693	now: 693
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:646. flip_cnt: 0, stem_cnt: 984, fault_cnt:1180
coverage: 86.740%	pattern: 44	before: 693	now: 659
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:728
coverage: 86.740%	pattern: 44	before: 659	now: 659
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:696
coverage: 86.761%	pattern: 45	before: 659	now: 658
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:1064. flip_cnt: 0, stem_cnt: 984, fault_cnt:1109
coverage: 87.887%	pattern: 46	before: 658	now: 602
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:661
coverage: 87.887%	pattern: 46	before: 602	now: 602
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:323. flip_cnt: 0, stem_cnt: 984, fault_cnt:1249
coverage: 88.229%	pattern: 47	before: 602	now: 585
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:659
coverage: 88.229%	pattern: 47	before: 585	now: 585
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:771
coverage: 88.270%	pattern: 48	before: 585	now: 583
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:969. flip_cnt: 0, stem_cnt: 984, fault_cnt:1111
coverage: 89.296%	pattern: 49	before: 583	now: 532
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:698
coverage: 89.296%	pattern: 49	before: 532	now: 532
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:792
coverage: 89.296%	pattern: 49	before: 532	now: 532
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 984, fault_cnt:779
coverage: 89.396%	pattern: 50	before: 532	now: 527
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:668
coverage: 89.396%	pattern: 50	before: 527	now: 527
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:698
coverage: 89.396%	pattern: 50	before: 527	now: 527
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:688
coverage: 89.396%	pattern: 50	before: 527	now: 527
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:795
coverage: 89.477%	pattern: 51	before: 527	now: 523
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:668
coverage: 89.477%	pattern: 51	before: 523	now: 523
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:676
coverage: 89.477%	pattern: 51	before: 523	now: 523
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:802
coverage: 89.477%	pattern: 51	before: 523	now: 523
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:775
coverage: 89.477%	pattern: 51	before: 523	now: 523
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:849
coverage: 89.517%	pattern: 52	before: 523	now: 521
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:737
coverage: 89.577%	pattern: 53	before: 521	now: 518
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:715
coverage: 89.658%	pattern: 54	before: 518	now: 514
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:637
coverage: 89.698%	pattern: 55	before: 514	now: 512
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681
coverage: 89.698%	pattern: 55	before: 512	now: 512
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:1140. flip_cnt: 0, stem_cnt: 984, fault_cnt:1160
coverage: 90.905%	pattern: 56	before: 512	now: 452
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:627. flip_cnt: 0, stem_cnt: 984, fault_cnt:1265
coverage: 91.569%	pattern: 57	before: 452	now: 419
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:437. flip_cnt: 0, stem_cnt: 984, fault_cnt:948
coverage: 92.032%	pattern: 58	before: 419	now: 396
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:811
coverage: 92.032%	pattern: 58	before: 396	now: 396
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 984, fault_cnt:1056
coverage: 92.334%	pattern: 59	before: 396	now: 381
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1053
coverage: 92.414%	pattern: 60	before: 381	now: 377
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:691
coverage: 92.414%	pattern: 60	before: 377	now: 377
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:821
coverage: 92.414%	pattern: 60	before: 377	now: 377
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785
coverage: 92.414%	pattern: 60	before: 377	now: 377
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 984, fault_cnt:931
coverage: 92.555%	pattern: 61	before: 377	now: 370
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:692
coverage: 92.575%	pattern: 62	before: 370	now: 369
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:777
coverage: 92.596%	pattern: 63	before: 369	now: 368
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:753
coverage: 92.596%	pattern: 63	before: 368	now: 368
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 984, fault_cnt:1098
coverage: 92.736%	pattern: 64	before: 368	now: 361
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:655
coverage: 92.736%	pattern: 64	before: 361	now: 361
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:688
coverage: 92.736%	pattern: 64	before: 361	now: 361
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:660
coverage: 92.736%	pattern: 64	before: 361	now: 361
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 984, fault_cnt:757
coverage: 92.857%	pattern: 65	before: 361	now: 355
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803
coverage: 92.857%	pattern: 65	before: 355	now: 355
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:668
coverage: 92.877%	pattern: 66	before: 355	now: 354
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:804
coverage: 92.877%	pattern: 66	before: 354	now: 354
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:770
coverage: 92.897%	pattern: 67	before: 354	now: 353
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:671
coverage: 92.897%	pattern: 67	before: 353	now: 353
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:677
coverage: 92.918%	pattern: 68	before: 353	now: 352
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:645
coverage: 92.918%	pattern: 68	before: 352	now: 352
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:798
coverage: 92.918%	pattern: 68	before: 352	now: 352
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806
coverage: 92.918%	pattern: 68	before: 352	now: 352
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:784
coverage: 92.918%	pattern: 68	before: 352	now: 352
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:794
coverage: 92.918%	pattern: 68	before: 352	now: 352
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:630
coverage: 92.918%	pattern: 68	before: 352	now: 352
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:710
coverage: 92.918%	pattern: 68	before: 352	now: 352
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 984, fault_cnt:1224
coverage: 93.280%	pattern: 69	before: 352	now: 334
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:776
coverage: 93.280%	pattern: 69	before: 334	now: 334
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:665
coverage: 93.280%	pattern: 69	before: 334	now: 334
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:669
coverage: 93.280%	pattern: 69	before: 334	now: 334
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:760
coverage: 93.300%	pattern: 70	before: 334	now: 333
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:680
coverage: 93.300%	pattern: 70	before: 333	now: 333
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:768
coverage: 93.300%	pattern: 70	before: 333	now: 333
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:699
coverage: 93.300%	pattern: 70	before: 333	now: 333
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:664
coverage: 93.300%	pattern: 70	before: 333	now: 333
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 984, fault_cnt:968
coverage: 93.581%	pattern: 71	before: 333	now: 319
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:676
coverage: 93.581%	pattern: 71	before: 319	now: 319
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:654
coverage: 93.581%	pattern: 71	before: 319	now: 319
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782
coverage: 93.581%	pattern: 71	before: 319	now: 319
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:650
coverage: 93.581%	pattern: 71	before: 319	now: 319
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 984, fault_cnt:980
coverage: 93.783%	pattern: 72	before: 319	now: 309
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1007
coverage: 93.863%	pattern: 73	before: 309	now: 305
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:760
coverage: 93.863%	pattern: 73	before: 305	now: 305
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:631
coverage: 93.863%	pattern: 73	before: 305	now: 305
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797
coverage: 93.863%	pattern: 73	before: 305	now: 305
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:589. flip_cnt: 0, stem_cnt: 984, fault_cnt:1232
coverage: 94.487%	pattern: 74	before: 305	now: 274
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:792
coverage: 94.507%	pattern: 75	before: 274	now: 273
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786
coverage: 94.507%	pattern: 75	before: 273	now: 273
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:822
coverage: 94.507%	pattern: 75	before: 273	now: 273
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:677
coverage: 94.507%	pattern: 75	before: 273	now: 273
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:861
coverage: 94.507%	pattern: 75	before: 273	now: 273
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1107
coverage: 94.547%	pattern: 76	before: 273	now: 271
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:691
coverage: 94.547%	pattern: 76	before: 271	now: 271
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:1028
coverage: 94.608%	pattern: 77	before: 271	now: 268
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1034
coverage: 94.648%	pattern: 78	before: 268	now: 266
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:715
coverage: 94.648%	pattern: 78	before: 266	now: 266
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:818
coverage: 94.648%	pattern: 78	before: 266	now: 266
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:692
coverage: 94.648%	pattern: 78	before: 266	now: 266
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674
coverage: 94.648%	pattern: 78	before: 266	now: 266
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 984, fault_cnt:984
coverage: 94.748%	pattern: 79	before: 266	now: 261
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:799
coverage: 94.748%	pattern: 79	before: 261	now: 261
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:756
coverage: 94.748%	pattern: 79	before: 261	now: 261
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:829
coverage: 94.748%	pattern: 79	before: 261	now: 261
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:885
coverage: 94.748%	pattern: 79	before: 261	now: 261
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807
coverage: 94.748%	pattern: 79	before: 261	now: 261
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:753
coverage: 94.748%	pattern: 79	before: 261	now: 261
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 984, fault_cnt:1052
coverage: 94.889%	pattern: 80	before: 261	now: 254
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:656
coverage: 94.889%	pattern: 80	before: 254	now: 254
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:757
coverage: 94.889%	pattern: 80	before: 254	now: 254
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:829
coverage: 94.909%	pattern: 81	before: 254	now: 253
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1075
coverage: 94.950%	pattern: 82	before: 253	now: 251
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:665
coverage: 94.950%	pattern: 82	before: 251	now: 251
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1044
coverage: 94.950%	pattern: 82	before: 251	now: 251
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:754
coverage: 94.950%	pattern: 82	before: 251	now: 251
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:772
coverage: 94.950%	pattern: 82	before: 251	now: 251
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:697
coverage: 94.950%	pattern: 82	before: 251	now: 251
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:964
coverage: 94.950%	pattern: 82	before: 251	now: 251
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:675
coverage: 94.950%	pattern: 82	before: 251	now: 251
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:323. flip_cnt: 0, stem_cnt: 984, fault_cnt:1138
coverage: 95.292%	pattern: 83	before: 251	now: 234
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806
coverage: 95.292%	pattern: 83	before: 234	now: 234
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:939
coverage: 95.332%	pattern: 84	before: 234	now: 232
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:930
coverage: 95.352%	pattern: 85	before: 232	now: 231
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:839
coverage: 95.352%	pattern: 85	before: 231	now: 231
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:820
coverage: 95.352%	pattern: 85	before: 231	now: 231
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:675
coverage: 95.352%	pattern: 85	before: 231	now: 231
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:838
coverage: 95.372%	pattern: 86	before: 231	now: 230
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:773
coverage: 95.392%	pattern: 87	before: 230	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:743
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:794
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:653
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:646
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:842
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:761
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:976
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:706
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:961
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:670
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:793
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:694
coverage: 95.392%	pattern: 87	before: 229	now: 229
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1064
coverage: 95.412%	pattern: 88	before: 229	now: 228
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:741
coverage: 95.412%	pattern: 88	before: 228	now: 228
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:733
coverage: 95.412%	pattern: 88	before: 228	now: 228
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:685
coverage: 95.412%	pattern: 88	before: 228	now: 228
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:787
coverage: 95.412%	pattern: 88	before: 228	now: 228
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:668
coverage: 95.412%	pattern: 88	before: 228	now: 228
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:757
coverage: 95.433%	pattern: 89	before: 228	now: 227
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:754
coverage: 95.433%	pattern: 89	before: 227	now: 227
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785
coverage: 95.433%	pattern: 89	before: 227	now: 227
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782
coverage: 95.433%	pattern: 89	before: 227	now: 227
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:699
coverage: 95.433%	pattern: 89	before: 227	now: 227
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:742
coverage: 95.433%	pattern: 89	before: 227	now: 227
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:676
coverage: 95.433%	pattern: 89	before: 227	now: 227
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 984, fault_cnt:1301
coverage: 95.674%	pattern: 90	before: 227	now: 215
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:753
coverage: 95.674%	pattern: 90	before: 215	now: 215
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:655
coverage: 95.694%	pattern: 91	before: 215	now: 214
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:818
coverage: 95.694%	pattern: 91	before: 214	now: 214
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:666
coverage: 95.694%	pattern: 91	before: 214	now: 214
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:418. flip_cnt: 0, stem_cnt: 984, fault_cnt:1273
coverage: 96.137%	pattern: 92	before: 214	now: 192
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1150
coverage: 96.217%	pattern: 93	before: 192	now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:774
coverage: 96.217%	pattern: 93	before: 188	now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:841
coverage: 96.217%	pattern: 93	before: 188	now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:762
coverage: 96.217%	pattern: 93	before: 188	now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:775
coverage: 96.217%	pattern: 93	before: 188	now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1063
coverage: 96.217%	pattern: 93	before: 188	now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:687
coverage: 96.217%	pattern: 93	before: 188	now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 984, fault_cnt:1277
coverage: 96.519%	pattern: 94	before: 188	now: 173
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:813
coverage: 96.519%	pattern: 94	before: 173	now: 173
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683
coverage: 96.519%	pattern: 94	before: 173	now: 173
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:737
coverage: 96.519%	pattern: 94	before: 173	now: 173
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1036
coverage: 96.539%	pattern: 95	before: 173	now: 172
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:646
coverage: 96.539%	pattern: 95	before: 172	now: 172
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:818
coverage: 96.539%	pattern: 95	before: 172	now: 172
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681
coverage: 96.539%	pattern: 95	before: 172	now: 172
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:973
coverage: 96.539%	pattern: 95	before: 172	now: 172
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 984, fault_cnt:1286
coverage: 96.720%	pattern: 96	before: 172	now: 163
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 984, fault_cnt:1166
coverage: 96.901%	pattern: 97	before: 163	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:837
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:792
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:684
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:956
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:712
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:805
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:641
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:819
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:740
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:676
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:996
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:804
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1244
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:988
coverage: 96.901%	pattern: 97	before: 154	now: 154
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 984, fault_cnt:1162
coverage: 97.304%	pattern: 98	before: 154	now: 134
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1031
coverage: 97.344%	pattern: 99	before: 134	now: 132
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:947
coverage: 97.344%	pattern: 99	before: 132	now: 132
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:686
coverage: 97.344%	pattern: 99	before: 132	now: 132
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:630
coverage: 97.344%	pattern: 99	before: 132	now: 132
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1055
coverage: 97.344%	pattern: 99	before: 132	now: 132
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:792
coverage: 97.344%	pattern: 99	before: 132	now: 132
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:783
coverage: 97.344%	pattern: 99	before: 132	now: 132
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766
coverage: 97.344%	pattern: 99	before: 132	now: 132
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:675
coverage: 97.344%	pattern: 99	before: 132	now: 132
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678
coverage: 97.344%	pattern: 99	before: 132	now: 132
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 984, fault_cnt:1338
coverage: 97.606%	pattern: 100	before: 132	now: 119
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1060
coverage: 97.646%	pattern: 101	before: 119	now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766
coverage: 97.646%	pattern: 101	before: 117	now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773
coverage: 97.646%	pattern: 101	before: 117	now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:744
coverage: 97.646%	pattern: 101	before: 117	now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:743
coverage: 97.646%	pattern: 101	before: 117	now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:787
coverage: 97.646%	pattern: 101	before: 117	now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1169
coverage: 97.666%	pattern: 102	before: 117	now: 116
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:791
coverage: 97.666%	pattern: 102	before: 116	now: 116
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1234
coverage: 97.746%	pattern: 103	before: 116	now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:658
coverage: 97.746%	pattern: 103	before: 112	now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:805
coverage: 97.746%	pattern: 103	before: 112	now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1151
coverage: 97.767%	pattern: 104	before: 112	now: 111
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:763
coverage: 97.767%	pattern: 104	before: 111	now: 111
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:810
coverage: 97.767%	pattern: 104	before: 111	now: 111
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785
coverage: 97.767%	pattern: 104	before: 111	now: 111
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:794
coverage: 97.767%	pattern: 104	before: 111	now: 111
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:768
coverage: 97.767%	pattern: 104	before: 111	now: 111
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:716
coverage: 97.767%	pattern: 104	before: 111	now: 111
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:692
coverage: 97.767%	pattern: 104	before: 111	now: 111
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:649
coverage: 97.767%	pattern: 104	before: 111	now: 111
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1147
coverage: 97.847%	pattern: 105	before: 111	now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769
coverage: 97.847%	pattern: 105	before: 107	now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:794
coverage: 97.847%	pattern: 105	before: 107	now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1052
coverage: 97.867%	pattern: 106	before: 107	now: 106
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:737
coverage: 97.867%	pattern: 106	before: 106	now: 106
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:675
coverage: 97.867%	pattern: 106	before: 106	now: 106
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:1204
coverage: 97.928%	pattern: 107	before: 106	now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:912
coverage: 97.928%	pattern: 107	before: 103	now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:696
coverage: 97.928%	pattern: 107	before: 103	now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:814
coverage: 97.928%	pattern: 107	before: 103	now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:827
coverage: 97.928%	pattern: 107	before: 103	now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:825
coverage: 97.928%	pattern: 107	before: 103	now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:993
coverage: 97.968%	pattern: 108	before: 103	now: 101
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1137
coverage: 97.968%	pattern: 108	before: 101	now: 101
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:652
coverage: 97.968%	pattern: 108	before: 101	now: 101
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:680
coverage: 97.968%	pattern: 108	before: 101	now: 101
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1079
coverage: 97.988%	pattern: 109	before: 101	now: 100
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:735
coverage: 97.988%	pattern: 109	before: 100	now: 100
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:695
coverage: 97.988%	pattern: 109	before: 100	now: 100
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:775
coverage: 98.008%	pattern: 110	before: 100	now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766
coverage: 98.008%	pattern: 110	before: 99	now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678
coverage: 98.008%	pattern: 110	before: 99	now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:713
coverage: 98.008%	pattern: 110	before: 99	now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:734
coverage: 98.008%	pattern: 110	before: 99	now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:840
coverage: 98.008%	pattern: 110	before: 99	now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:752
coverage: 98.008%	pattern: 110	before: 99	now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:738
coverage: 98.008%	pattern: 110	before: 99	now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:819
coverage: 98.008%	pattern: 110	before: 99	now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1381
coverage: 98.048%	pattern: 111	before: 99	now: 97
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:801
coverage: 98.048%	pattern: 111	before: 97	now: 97
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:673
coverage: 98.048%	pattern: 111	before: 97	now: 97
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:702
coverage: 98.048%	pattern: 111	before: 97	now: 97
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797
coverage: 98.048%	pattern: 111	before: 97	now: 97
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1272
coverage: 98.068%	pattern: 112	before: 97	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:763
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:793
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:789
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:915
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:754
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:645
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:772
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:737
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:649
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:656
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:705
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674
coverage: 98.068%	pattern: 112	before: 96	now: 96
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:670
coverage: 98.089%	pattern: 113	before: 96	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:654
coverage: 98.089%	pattern: 113	before: 95	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1104
coverage: 98.089%	pattern: 113	before: 95	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:688
coverage: 98.089%	pattern: 113	before: 95	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:617
coverage: 98.089%	pattern: 113	before: 95	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:669
coverage: 98.089%	pattern: 113	before: 95	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:729
coverage: 98.089%	pattern: 113	before: 95	now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1138
coverage: 98.169%	pattern: 114	before: 95	now: 91
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:724
coverage: 98.169%	pattern: 114	before: 91	now: 91
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:738
coverage: 98.169%	pattern: 114	before: 91	now: 91
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:987
coverage: 98.169%	pattern: 114	before: 91	now: 91
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:776
coverage: 98.169%	pattern: 114	before: 91	now: 91
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:816
coverage: 98.169%	pattern: 114	before: 91	now: 91
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:827
coverage: 98.169%	pattern: 114	before: 91	now: 91
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1145
coverage: 98.189%	pattern: 115	before: 91	now: 90
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704
coverage: 98.189%	pattern: 115	before: 90	now: 90
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:721
coverage: 98.189%	pattern: 115	before: 90	now: 90
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1043
coverage: 98.189%	pattern: 115	before: 90	now: 90
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1285
coverage: 98.229%	pattern: 116	before: 90	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1353
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:907
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:698
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:847
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:772
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:694
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:699
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:774
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:682
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:767
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:669
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782
coverage: 98.229%	pattern: 116	before: 88	now: 88
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 984, fault_cnt:1145
coverage: 98.330%	pattern: 117	before: 88	now: 83
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:745
coverage: 98.330%	pattern: 117	before: 83	now: 83
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1250
coverage: 98.370%	pattern: 118	before: 83	now: 81
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:701
coverage: 98.370%	pattern: 118	before: 81	now: 81
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704
coverage: 98.370%	pattern: 118	before: 81	now: 81
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:795
coverage: 98.370%	pattern: 118	before: 81	now: 81
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:776
coverage: 98.370%	pattern: 118	before: 81	now: 81
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:685
coverage: 98.390%	pattern: 119	before: 81	now: 80
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1276
coverage: 98.471%	pattern: 120	before: 80	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:701
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:901
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:664
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:795
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:784
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:789
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:733
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:809
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:812
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1096
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:932
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:768
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:684
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1268
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:859
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1158
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:779
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1062
coverage: 98.471%	pattern: 120	before: 76	now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1052
coverage: 98.511%	pattern: 121	before: 76	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:738
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:760
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:767
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:829
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:653
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:805
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:982
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1262
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1155
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:705
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1061
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:662
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:706
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:784
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:767
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:642
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:802
coverage: 98.511%	pattern: 121	before: 74	now: 74
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:1262
coverage: 98.571%	pattern: 122	before: 74	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:779
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:754
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:821
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:979
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1158
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:695
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:639
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:685
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:824
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:740
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:813
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:759
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:665
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:655
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:932
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:858
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:670
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:753
coverage: 98.571%	pattern: 122	before: 71	now: 71
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:785
coverage: 98.592%	pattern: 123	before: 71	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:671
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:808
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:762
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:767
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:632
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:686
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:802
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:855
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1107
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:775
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:614
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:825
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1002
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:776
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:876
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:815
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:948
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:772
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:717
coverage: 98.592%	pattern: 123	before: 70	now: 70
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 984, fault_cnt:1275
coverage: 98.672%	pattern: 124	before: 70	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:703
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:749
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:977
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1244
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:670
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:764
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:795
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:970
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:784
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:827
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:815
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:792
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:646
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1129
coverage: 98.672%	pattern: 124	before: 66	now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1135
coverage: 98.692%	pattern: 125	before: 66	now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:871
coverage: 98.692%	pattern: 125	before: 65	now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:796
coverage: 98.692%	pattern: 125	before: 65	now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:654
coverage: 98.692%	pattern: 125	before: 65	now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1123
coverage: 98.732%	pattern: 126	before: 65	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:785
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:771
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:682
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:825
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:679
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:662
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:648
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:839
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1025
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:702
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:810
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:659
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:768
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:774
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:944
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:985
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:863
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:774
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:768
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1065
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:646
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1096
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1045
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1077
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:867
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:765
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:826
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:687
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:810
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:698
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:665
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:869
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:938
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1020
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1102
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:690
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:756
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:801
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:742
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:661
coverage: 98.732%	pattern: 126	before: 63	now: 63
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1095
coverage: 98.753%	pattern: 127	before: 63	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:805
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:692
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1414
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1243
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:910
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:664
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:808
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:670
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1092
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:789
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:956
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1259
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:639
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:815
coverage: 98.753%	pattern: 127	before: 62	now: 62
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:666
coverage: 98.773%	pattern: 128	before: 62	now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:694
coverage: 98.773%	pattern: 128	before: 61	now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803
coverage: 98.773%	pattern: 128	before: 61	now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803
coverage: 98.773%	pattern: 128	before: 61	now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1109
coverage: 98.773%	pattern: 128	before: 61	now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:761
coverage: 98.773%	pattern: 128	before: 61	now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:726
coverage: 98.773%	pattern: 128	before: 61	now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1229
coverage: 98.813%	pattern: 129	before: 61	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:671
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:670
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:787
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:661
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:658
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:793
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:671
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:716
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:699
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1070
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:697
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:779
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1159
coverage: 98.813%	pattern: 129	before: 59	now: 59
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1269
coverage: 98.853%	pattern: 130	before: 59	now: 57
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:693
coverage: 98.853%	pattern: 130	before: 57	now: 57
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:814
coverage: 98.853%	pattern: 130	before: 57	now: 57
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:810
coverage: 98.853%	pattern: 130	before: 57	now: 57
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:869
coverage: 98.913%	pattern: 131	before: 57	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:761
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:663
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:712
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:654
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:805
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:722
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:742
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:810
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:831
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:756
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:823
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:688
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:787
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:760
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:715
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1151
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:966
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:801
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:781
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:694
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:679
coverage: 98.913%	pattern: 131	before: 54	now: 54
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:816
coverage: 98.934%	pattern: 132	before: 54	now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:691
coverage: 98.934%	pattern: 132	before: 53	now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:656
coverage: 98.934%	pattern: 132	before: 53	now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:662
coverage: 98.934%	pattern: 132	before: 53	now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:867
coverage: 98.934%	pattern: 132	before: 53	now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 984, fault_cnt:1115
coverage: 98.994%	pattern: 133	before: 53	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:667
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:757
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:788
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:677
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:812
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:742
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1084
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:775
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:963
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:721
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1018
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:708
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:790
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:834
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:743
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:963
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:679
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:653
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:764
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:778
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:671
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:837
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:647
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:788
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:634
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:654
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:727
coverage: 98.994%	pattern: 133	before: 50	now: 50
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1137
coverage: 99.014%	pattern: 134	before: 50	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:808
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:686
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:833
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:665
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:794
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:770
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:687
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1195
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1068
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:778
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:726
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:964
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:724
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:792
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:679
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:733
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1029
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:865
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:717
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:677
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:752
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:817
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1209
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:715
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1279
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:800
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:767
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:922
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1278
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:982
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:680
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1141
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:726
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:757
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:862
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1111
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:691
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:857
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:809
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:864
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:707
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:929
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:762
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:686
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:672
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:742
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:685
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:784
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:819
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:951
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:764
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:806
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:757
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:765
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1097
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:674
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:687
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:668
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:968
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:628
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:855
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:829
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1065
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:655
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1265
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:645
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:642
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:772
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:760
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:781
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:875
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:799
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1084
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1167
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1022
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:679
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1321
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:780
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:759
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:681
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:754
coverage: 99.014%	pattern: 134	before: 49	now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1296
coverage: 99.054%	pattern: 135	before: 49	now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:677
coverage: 99.054%	pattern: 135	before: 47	now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1331
coverage: 99.095%	pattern: 136	before: 47	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:809
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:769
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:740
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:797
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:700
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:793
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:708
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:755
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:641
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:669
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:789
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:675
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:798
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1244
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1079
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:803
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:963
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:776
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:655
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:714
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:804
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:989
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:786
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:658
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1102
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:916
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:706
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1004
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1019
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:773
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:777
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:929
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:823
coverage: 99.095%	pattern: 136	before: 45	now: 45
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 984, fault_cnt:1176
coverage: 99.135%	pattern: 137	before: 45	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:821
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:834
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:704
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:655
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1153
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:658
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:800
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:782
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:619
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:678
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:631
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:826
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1063
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:938
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1227
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1021
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:749
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:653
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:764
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:900
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:966
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:756
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1080
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:757
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:765
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:690
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:683
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:999
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1041
coverage: 99.135%	pattern: 137	before: 43	now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:1297
coverage: 99.155%	pattern: 138	before: 43	now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:807
coverage: 99.155%	pattern: 138	before: 42	now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:989
coverage: 99.155%	pattern: 138	before: 42	now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1078
coverage: 99.155%	pattern: 138	before: 42	now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 984, fault_cnt:806
coverage: 99.175%	pattern: 139	before: 42	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:728
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:824
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1255
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:780
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:734
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1144
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:820
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:781
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:798
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1149
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1104
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:667
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:966
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:800
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:698
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:1087
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:731
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:780
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:766
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 984, fault_cnt:661
coverage: 99.175%	pattern: 139	before: 41	now: 41
checking valid circuit ... result: 1.