make: 'atpg' is up to date. ======================== parsing file ./benchmark/c7552.bench ... Done. ====== Circuit Statistics ====== PI: 207 PO: 108 Gate: 3719 Stem: 1537 Level: 10 ================================ [SOL] flip: 0, stem: 0, fault:26624. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1413 coverage: 18.997% pattern: 1 before: 7438 now: 6025 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:21122. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1740 coverage: 34.149% pattern: 2 before: 6025 now: 4898 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:7932. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1484 coverage: 40.199% pattern: 3 before: 4898 now: 4448 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:8685. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1482 coverage: 46.491% pattern: 4 before: 4448 now: 3980 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:6199. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1429 coverage: 50.901% pattern: 5 before: 3980 now: 3652 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:4890. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1565 coverage: 54.369% pattern: 6 before: 3652 now: 3394 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:5742. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1591 coverage: 58.457% pattern: 7 before: 3394 now: 3090 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:4304. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1610 coverage: 61.589% pattern: 8 before: 3090 now: 2857 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:2698. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1547 coverage: 63.498% pattern: 9 before: 2857 now: 2715 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:4898. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1678 coverage: 67.021% pattern: 10 before: 2715 now: 2453 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:2812. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1628 coverage: 69.010% pattern: 11 before: 2453 now: 2305 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1333. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1526 coverage: 69.965% pattern: 12 before: 2305 now: 2234 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:2603. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1643 coverage: 71.807% pattern: 13 before: 2234 now: 2097 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1672. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 coverage: 72.990% pattern: 14 before: 2097 now: 2009 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:2831. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1613 coverage: 74.993% pattern: 15 before: 2009 now: 1860 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:703. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1434 coverage: 75.491% pattern: 16 before: 1860 now: 1823 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1596. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1584 coverage: 76.620% pattern: 17 before: 1823 now: 1739 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:2414. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1696 coverage: 78.341% pattern: 18 before: 1739 now: 1611 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1064. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1555 coverage: 79.094% pattern: 19 before: 1611 now: 1555 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1805. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1738 coverage: 80.371% pattern: 20 before: 1555 now: 1460 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:399. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1507 coverage: 80.653% pattern: 21 before: 1460 now: 1439 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:3800. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1881 coverage: 83.342% pattern: 22 before: 1439 now: 1239 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:96. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1483 coverage: 83.423% pattern: 23 before: 1239 now: 1233 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:665. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1526 coverage: 83.894% pattern: 24 before: 1233 now: 1198 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:665. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1509 coverage: 84.364% pattern: 25 before: 1198 now: 1163 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:494. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1570 coverage: 84.714% pattern: 26 before: 1163 now: 1137 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:437. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1417 coverage: 85.023% pattern: 27 before: 1137 now: 1114 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:551. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1524 coverage: 85.413% pattern: 28 before: 1114 now: 1085 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:950. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1642 coverage: 86.085% pattern: 29 before: 1085 now: 1035 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1479 coverage: 86.179% pattern: 30 before: 1035 now: 1028 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1523 coverage: 86.287% pattern: 31 before: 1028 now: 1020 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 coverage: 86.314% pattern: 32 before: 1020 now: 1018 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:988. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1818 coverage: 87.013% pattern: 33 before: 1018 now: 966 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1459 coverage: 87.013% pattern: 33 before: 966 now: 966 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:570. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1558 coverage: 87.416% pattern: 34 before: 966 now: 936 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1488 coverage: 87.524% pattern: 35 before: 936 now: 928 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1617 coverage: 87.779% pattern: 36 before: 928 now: 909 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1638 coverage: 87.994% pattern: 37 before: 909 now: 893 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1442 coverage: 87.994% pattern: 37 before: 893 now: 893 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1744 coverage: 88.155% pattern: 38 before: 893 now: 881 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1526 coverage: 88.196% pattern: 39 before: 881 now: 878 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:399. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1749 coverage: 88.478% pattern: 40 before: 878 now: 857 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1531 coverage: 88.747% pattern: 41 before: 857 now: 837 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1499 coverage: 88.841% pattern: 42 before: 837 now: 830 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1642 coverage: 89.029% pattern: 43 before: 830 now: 816 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:532. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1751 coverage: 89.406% pattern: 44 before: 816 now: 788 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1537 coverage: 89.527% pattern: 45 before: 788 now: 779 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1593 coverage: 89.688% pattern: 46 before: 779 now: 767 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1473 coverage: 89.769% pattern: 47 before: 767 now: 761 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1547 coverage: 89.849% pattern: 48 before: 761 now: 755 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1463 coverage: 89.876% pattern: 49 before: 755 now: 753 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1505 coverage: 90.024% pattern: 50 before: 753 now: 742 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1423 coverage: 90.051% pattern: 51 before: 742 now: 740 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1577 coverage: 90.199% pattern: 52 before: 740 now: 729 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1477 coverage: 90.239% pattern: 53 before: 729 now: 726 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1456 coverage: 90.239% pattern: 53 before: 726 now: 726 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1477 coverage: 90.481% pattern: 54 before: 726 now: 708 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1698 coverage: 90.696% pattern: 55 before: 708 now: 692 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 coverage: 90.750% pattern: 56 before: 692 now: 688 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1627 coverage: 90.844% pattern: 57 before: 688 now: 681 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:760. flip_cnt: 0, stem_cnt: 1537, fault_cnt:2033 coverage: 91.382% pattern: 58 before: 681 now: 641 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1444 coverage: 91.382% pattern: 58 before: 641 now: 641 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1544 coverage: 91.409% pattern: 59 before: 641 now: 639 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1783 coverage: 91.624% pattern: 60 before: 639 now: 623 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 coverage: 91.691% pattern: 61 before: 623 now: 618 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1426 coverage: 91.718% pattern: 62 before: 618 now: 616 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1586 coverage: 91.880% pattern: 63 before: 616 now: 604 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1575 coverage: 91.880% pattern: 63 before: 604 now: 604 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1444 coverage: 91.906% pattern: 64 before: 604 now: 602 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1853 coverage: 91.974% pattern: 65 before: 602 now: 597 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1500 coverage: 92.001% pattern: 66 before: 597 now: 595 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1628 coverage: 92.068% pattern: 67 before: 595 now: 590 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1517 coverage: 92.135% pattern: 68 before: 590 now: 585 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1492 coverage: 92.229% pattern: 69 before: 585 now: 578 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1459 coverage: 92.229% pattern: 69 before: 578 now: 578 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 coverage: 92.229% pattern: 69 before: 578 now: 578 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1900 coverage: 92.377% pattern: 70 before: 578 now: 567 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1438 coverage: 92.377% pattern: 70 before: 567 now: 567 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1524 coverage: 92.377% pattern: 70 before: 567 now: 567 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 coverage: 92.377% pattern: 70 before: 567 now: 567 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1555 coverage: 92.390% pattern: 71 before: 567 now: 566 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1527 coverage: 92.404% pattern: 72 before: 566 now: 565 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1441 coverage: 92.417% pattern: 73 before: 565 now: 564 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1481 coverage: 92.417% pattern: 73 before: 564 now: 564 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1578 coverage: 92.417% pattern: 73 before: 564 now: 564 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1535 coverage: 92.417% pattern: 73 before: 564 now: 564 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1548 coverage: 92.458% pattern: 74 before: 564 now: 561 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1565 coverage: 92.485% pattern: 75 before: 561 now: 559 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1454 coverage: 92.525% pattern: 76 before: 559 now: 556 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1692 coverage: 92.565% pattern: 77 before: 556 now: 553 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1518 coverage: 92.606% pattern: 78 before: 553 now: 550 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1642 coverage: 92.632% pattern: 79 before: 550 now: 548 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1450 coverage: 92.632% pattern: 79 before: 548 now: 548 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1947 coverage: 92.727% pattern: 80 before: 548 now: 541 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1442 coverage: 92.727% pattern: 80 before: 541 now: 541 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 coverage: 92.753% pattern: 81 before: 541 now: 539 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1523 coverage: 92.780% pattern: 82 before: 539 now: 537 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:741. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1682 coverage: 93.305% pattern: 83 before: 537 now: 498 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1632 coverage: 93.305% pattern: 83 before: 498 now: 498 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1534 coverage: 93.318% pattern: 84 before: 498 now: 497 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1475 coverage: 93.412% pattern: 85 before: 497 now: 490 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1477 coverage: 93.412% pattern: 85 before: 490 now: 490 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 coverage: 93.412% pattern: 85 before: 490 now: 490 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1490 coverage: 93.439% pattern: 86 before: 490 now: 488 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1496 coverage: 93.439% pattern: 86 before: 488 now: 488 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1812 coverage: 93.493% pattern: 87 before: 488 now: 484 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1582 coverage: 93.520% pattern: 88 before: 484 now: 482 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1647 coverage: 93.600% pattern: 89 before: 482 now: 476 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1542 coverage: 93.600% pattern: 89 before: 476 now: 476 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1565 coverage: 93.600% pattern: 89 before: 476 now: 476 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1427 coverage: 93.600% pattern: 89 before: 476 now: 476 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1481 coverage: 93.627% pattern: 90 before: 476 now: 474 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1461 coverage: 93.695% pattern: 91 before: 474 now: 469 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1574 coverage: 93.695% pattern: 91 before: 469 now: 469 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1548 coverage: 93.695% pattern: 91 before: 469 now: 469 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1861 coverage: 93.695% pattern: 91 before: 469 now: 469 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1567 coverage: 93.721% pattern: 92 before: 469 now: 467 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1755 coverage: 93.748% pattern: 93 before: 467 now: 465 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1621 coverage: 93.802% pattern: 94 before: 465 now: 461 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 coverage: 93.802% pattern: 94 before: 461 now: 461 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1600 coverage: 93.856% pattern: 95 before: 461 now: 457 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1579 coverage: 93.883% pattern: 96 before: 457 now: 455 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1761 coverage: 93.937% pattern: 97 before: 455 now: 451 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1432 coverage: 93.937% pattern: 97 before: 451 now: 451 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1425 coverage: 93.937% pattern: 97 before: 451 now: 451 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1893 coverage: 93.977% pattern: 98 before: 451 now: 448 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1421 coverage: 93.977% pattern: 98 before: 448 now: 448 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1462 coverage: 93.990% pattern: 99 before: 448 now: 447 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1452 coverage: 93.990% pattern: 99 before: 447 now: 447 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1864 coverage: 93.990% pattern: 99 before: 447 now: 447 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1633 coverage: 94.017% pattern: 100 before: 447 now: 445 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1834 coverage: 94.017% pattern: 100 before: 445 now: 445 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1903 coverage: 94.017% pattern: 100 before: 445 now: 445 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1425 coverage: 94.017% pattern: 100 before: 445 now: 445 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1525 coverage: 94.017% pattern: 100 before: 445 now: 445 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1490 coverage: 94.017% pattern: 100 before: 445 now: 445 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1540 coverage: 94.044% pattern: 101 before: 445 now: 443 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 coverage: 94.044% pattern: 101 before: 443 now: 443 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1564 coverage: 94.044% pattern: 101 before: 443 now: 443 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1521 coverage: 94.071% pattern: 102 before: 443 now: 441 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1446 coverage: 94.071% pattern: 102 before: 441 now: 441 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1600 coverage: 94.071% pattern: 102 before: 441 now: 441 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1466 coverage: 94.125% pattern: 103 before: 441 now: 437 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1545 coverage: 94.125% pattern: 103 before: 437 now: 437 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1556 coverage: 94.125% pattern: 103 before: 437 now: 437 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1590 coverage: 94.125% pattern: 103 before: 437 now: 437 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1593 coverage: 94.125% pattern: 103 before: 437 now: 437 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1450 coverage: 94.125% pattern: 103 before: 437 now: 437 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1419 coverage: 94.125% pattern: 103 before: 437 now: 437 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1585 coverage: 94.125% pattern: 103 before: 437 now: 437 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1567 coverage: 94.125% pattern: 103 before: 437 now: 437 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1824 coverage: 94.138% pattern: 104 before: 437 now: 436 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1496 coverage: 94.138% pattern: 104 before: 436 now: 436 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1503 coverage: 94.138% pattern: 104 before: 436 now: 436 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1640 coverage: 94.165% pattern: 105 before: 436 now: 434 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1577 coverage: 94.165% pattern: 105 before: 434 now: 434 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:2151 coverage: 94.192% pattern: 106 before: 434 now: 432 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1646 coverage: 94.219% pattern: 107 before: 432 now: 430 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1484 coverage: 94.246% pattern: 108 before: 430 now: 428 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 coverage: 94.246% pattern: 108 before: 428 now: 428 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1519 coverage: 94.246% pattern: 108 before: 428 now: 428 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1894 coverage: 94.286% pattern: 109 before: 428 now: 425 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1611 coverage: 94.286% pattern: 109 before: 425 now: 425 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1548 coverage: 94.286% pattern: 109 before: 425 now: 425 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1589 coverage: 94.286% pattern: 109 before: 425 now: 425 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1725 coverage: 94.326% pattern: 110 before: 425 now: 422 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1465 coverage: 94.326% pattern: 110 before: 422 now: 422 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1624 coverage: 94.326% pattern: 110 before: 422 now: 422 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1527 coverage: 94.326% pattern: 110 before: 422 now: 422 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1819 coverage: 94.326% pattern: 110 before: 422 now: 422 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1513 coverage: 94.380% pattern: 111 before: 422 now: 418 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1459 coverage: 94.380% pattern: 111 before: 418 now: 418 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1737 coverage: 94.380% pattern: 111 before: 418 now: 418 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1450 coverage: 94.407% pattern: 112 before: 418 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1454 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1816 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1515 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1594 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1550 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:2149 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1436 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1471 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1717 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1435 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1433 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1616 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1446 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1502 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1457 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1471 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1570 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1420 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1623 coverage: 94.407% pattern: 112 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1804 coverage: 94.461% pattern: 113 before: 416 now: 412 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 coverage: 94.515% pattern: 114 before: 412 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1457 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1575 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1536 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1443 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:2011 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1468 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1506 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1502 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1430 coverage: 94.515% pattern: 114 before: 408 now: 408 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1526 coverage: 94.582% pattern: 115 before: 408 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1547 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1750 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1701 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1468 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1492 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1560 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1460 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1486 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1467 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1712 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1518 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1533 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1622 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1452 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1418 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1462 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1450 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1658 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1539 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1552 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1562 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1533 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1432 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1425 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1518 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1517 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1446 coverage: 94.582% pattern: 115 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1483 coverage: 94.595% pattern: 116 before: 403 now: 402 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1592 coverage: 94.595% pattern: 116 before: 402 now: 402 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1505 coverage: 94.595% pattern: 116 before: 402 now: 402 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1455 coverage: 94.595% pattern: 116 before: 402 now: 402 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1606 coverage: 94.595% pattern: 116 before: 402 now: 402 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1498 coverage: 94.595% pattern: 116 before: 402 now: 402 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1835 coverage: 94.609% pattern: 117 before: 402 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1751 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1586 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1500 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1528 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1844 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1844 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1515 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1494 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1922 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1509 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1423 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1503 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1532 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1489 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1508 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1582 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1462 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1710 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1560 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1540 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1538 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1871 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1662 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1600 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1624 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1559 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1775 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1770 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1449 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1434 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1537 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1568 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1648 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1441 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1436 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1521 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1415 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1732 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1572 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1480 coverage: 94.609% pattern: 117 before: 401 now: 401 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1811 coverage: 94.622% pattern: 118 before: 401 now: 400 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1579 coverage: 94.622% pattern: 118 before: 400 now: 400 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1537 coverage: 94.622% pattern: 118 before: 400 now: 400 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1559 coverage: 94.622% pattern: 118 before: 400 now: 400 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1695 coverage: 94.622% pattern: 118 before: 400 now: 400 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1704 coverage: 94.622% pattern: 118 before: 400 now: 400 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1613 coverage: 94.622% pattern: 118 before: 400 now: 400 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1603 coverage: 94.649% pattern: 119 before: 400 now: 398 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1430 coverage: 94.649% pattern: 119 before: 398 now: 398 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1510 coverage: 94.649% pattern: 119 before: 398 now: 398 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1635 coverage: 94.649% pattern: 119 before: 398 now: 398 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1662 coverage: 94.649% pattern: 119 before: 398 now: 398 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1486 coverage: 94.649% pattern: 119 before: 398 now: 398 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1418 coverage: 94.649% pattern: 119 before: 398 now: 398 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1495 coverage: 94.649% pattern: 119 before: 398 now: 398 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1523 coverage: 94.649% pattern: 119 before: 398 now: 398 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 coverage: 94.757% pattern: 120 before: 398 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1524 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1578 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:2157 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1559 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1441 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1500 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1569 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1617 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1772 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1549 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1538 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1847 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1425 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1410 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1611 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1513 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1546 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1448 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1470 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1455 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1558 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1503 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1597 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1535 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1590 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1533 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1534 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1429 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1800 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1442 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1507 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1451 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1452 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1484 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1482 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1505 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1502 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1518 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1572 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1422 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1481 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1468 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1587 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1764 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1454 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1478 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1976 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1597 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1590 coverage: 94.757% pattern: 120 before: 390 now: 390 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1517 coverage: 94.891% pattern: 121 before: 390 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1427 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1562 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1547 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1624 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1458 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1478 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1798 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1428 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1424 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1444 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1515 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1826 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1520 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1476 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1528 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1497 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1443 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1551 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1481 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1553 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1467 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1843 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1536 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1530 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1513 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1416 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1543 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1561 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1555 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1438 coverage: 94.891% pattern: 121 before: 380 now: 380 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1603 coverage: 94.945% pattern: 122 before: 380 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1530 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1441 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1474 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1865 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1495 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1478 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1835 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1642 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1589 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1479 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1422 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1436 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1568 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1434 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1449 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1584 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1504 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1571 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1860 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1456 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1541 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1556 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1518 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1414 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1510 coverage: 94.945% pattern: 122 before: 376 now: 376 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:285. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1683 coverage: 95.147% pattern: 123 before: 376 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1411 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1550 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1733 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1557 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1549 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1557 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1542 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1506 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1659 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1443 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1560 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1445 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1453 coverage: 95.147% pattern: 123 before: 361 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1593 coverage: 95.200% pattern: 124 before: 361 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1503 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1553 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1426 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1670 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1586 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1477 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1508 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1700 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1534 coverage: 95.200% pattern: 124 before: 357 now: 357 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1642 coverage: 95.214% pattern: 125 before: 357 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1500 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1585 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1933 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1473 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1488 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1529 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1517 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1504 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1833 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1557 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1731 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1430 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1588 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1560 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1422 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1398 coverage: 95.214% pattern: 125 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1452 coverage: 95.254% pattern: 126 before: 356 now: 353 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1460 coverage: 95.254% pattern: 126 before: 353 now: 353 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1559 coverage: 95.254% pattern: 126 before: 353 now: 353 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1551 coverage: 95.254% pattern: 126 before: 353 now: 353 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:6. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1896 coverage: 95.268% pattern: 127 before: 353 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1576 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1916 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1544 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1712 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1592 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1428 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1601 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1640 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1462 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1449 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1456 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1458 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1492 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1749 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1520 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1520 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1416 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1412 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1446 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1421 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1453 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1550 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1652 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1570 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1581 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1447 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1466 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1579 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1423 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1430 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1551 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1751 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1578 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1517 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1700 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1442 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1735 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1568 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1456 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1467 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1524 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1602 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1583 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1476 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1420 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1491 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1794 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1544 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1504 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1485 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1521 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1446 coverage: 95.268% pattern: 127 before: 352 now: 352 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1515 coverage: 95.375% pattern: 128 before: 352 now: 344 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1530 coverage: 95.375% pattern: 128 before: 344 now: 344 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1437 coverage: 95.375% pattern: 128 before: 344 now: 344 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1623 coverage: 95.375% pattern: 128 before: 344 now: 344 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1525 coverage: 95.375% pattern: 128 before: 344 now: 344 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1587 coverage: 95.483% pattern: 129 before: 344 now: 336 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1432 coverage: 95.483% pattern: 129 before: 336 now: 336 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1449 coverage: 95.483% pattern: 129 before: 336 now: 336 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1542 coverage: 95.483% pattern: 129 before: 336 now: 336 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1861 coverage: 95.671% pattern: 130 before: 336 now: 322 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1511 coverage: 95.671% pattern: 130 before: 322 now: 322 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1433 coverage: 95.671% pattern: 130 before: 322 now: 322 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1564 coverage: 95.671% pattern: 130 before: 322 now: 322 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1521 coverage: 95.671% pattern: 130 before: 322 now: 322 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1748 coverage: 95.671% pattern: 130 before: 322 now: 322 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1513 coverage: 95.671% pattern: 130 before: 322 now: 322 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1697 coverage: 95.684% pattern: 131 before: 322 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1601 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1532 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1479 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1536 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1467 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1475 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1534 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1551 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1432 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1590 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1606 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1648 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1386 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1451 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1585 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1437 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1447 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1492 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1724 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1457 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1424 coverage: 95.684% pattern: 131 before: 321 now: 321 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1661 coverage: 95.738% pattern: 132 before: 321 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1508 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1497 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1596 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1551 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1874 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1557 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1441 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1483 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1626 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1573 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1821 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1898 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1552 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1539 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1479 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1531 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1526 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1531 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1666 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1420 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1528 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1746 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1716 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1439 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1553 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1528 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1496 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1847 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1651 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1420 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1494 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1626 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1472 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1525 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1566 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1858 coverage: 95.738% pattern: 132 before: 317 now: 317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1659 coverage: 95.778% pattern: 133 before: 317 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1564 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1487 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1833 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1575 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1593 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1506 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1600 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1580 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1447 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1808 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1553 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1530 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1497 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1459 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1464 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1515 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1598 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1502 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1402 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1854 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1937 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1570 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1693 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1412 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1673 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1713 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1581 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1528 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1585 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1522 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1487 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1482 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1494 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1523 coverage: 95.778% pattern: 133 before: 314 now: 314 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1476 coverage: 95.832% pattern: 134 before: 314 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1484 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1487 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1484 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1844 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1469 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1482 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1516 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1555 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1501 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1922 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1723 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1537, fault_cnt:1599 coverage: 95.832% pattern: 134 before: 310 now: 310 checking valid circuit ... result: 1.