make: 'atpg' is up to date.
========================
parsing file ./benchmark/b03.bench ... Done.
====== Circuit Statistics ====== 
PI:	34
PO:	34
Gate:	152
Stem:	86
Level:	3
================================ 
[SOL] flip: 0, stem: 0, fault:741. flip_cnt: 0, stem_cnt: 86, fault_cnt:117
coverage: 38.487%	pattern: 1	before: 304	now: 187
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:440. flip_cnt: 0, stem_cnt: 86, fault_cnt:114
coverage: 65.789%	pattern: 2	before: 187	now: 104
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:338. flip_cnt: 0, stem_cnt: 86, fault_cnt:119
coverage: 78.618%	pattern: 3	before: 104	now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:113. flip_cnt: 0, stem_cnt: 86, fault_cnt:119
coverage: 84.539%	pattern: 4	before: 65	now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:137. flip_cnt: 0, stem_cnt: 86, fault_cnt:111
coverage: 92.434%	pattern: 5	before: 47	now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:32. flip_cnt: 0, stem_cnt: 86, fault_cnt:107
coverage: 94.737%	pattern: 6	before: 23	now: 16
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:4. flip_cnt: 0, stem_cnt: 86, fault_cnt:108
coverage: 95.724%	pattern: 7	before: 16	now: 13
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 86, fault_cnt:112
coverage: 96.382%	pattern: 8	before: 13	now: 11
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:2. flip_cnt: 0, stem_cnt: 86, fault_cnt:120
coverage: 96.711%	pattern: 9	before: 11	now: 10
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:112
coverage: 96.711%	pattern: 9	before: 10	now: 10
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 86, fault_cnt:115
coverage: 98.355%	pattern: 10	before: 10	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:120
coverage: 98.355%	pattern: 10	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:125
coverage: 98.355%	pattern: 10	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:118
coverage: 98.355%	pattern: 10	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:111
coverage: 98.355%	pattern: 10	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:124
coverage: 98.355%	pattern: 10	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:123
coverage: 98.355%	pattern: 10	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:125
coverage: 98.355%	pattern: 10	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:118
coverage: 98.355%	pattern: 10	before: 5	now: 5
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:15. flip_cnt: 0, stem_cnt: 86, fault_cnt:109
coverage: 99.342%	pattern: 11	before: 5	now: 2
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:109
coverage: 99.342%	pattern: 11	before: 2	now: 2
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:112
coverage: 99.342%	pattern: 11	before: 2	now: 2
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:1. flip_cnt: 0, stem_cnt: 86, fault_cnt:115
coverage: 99.671%	pattern: 12	before: 2	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:115
coverage: 99.671%	pattern: 12	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:114
coverage: 99.671%	pattern: 12	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:116
coverage: 99.671%	pattern: 12	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:111
coverage: 99.671%	pattern: 12	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 86, fault_cnt:117
coverage: 99.671%	pattern: 12	before: 1	now: 1
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:3. flip_cnt: 0, stem_cnt: 86, fault_cnt:114
coverage: 100.000%	pattern: 13	before: 1	now: 0
checking valid circuit ... result: 1.

real	0m0.783s
user	0m0.778s
sys	0m0.004s