make: 'atpg' is up to date. ======================== parsing file ./benchmark/c3540.bench ... Done. ====== Circuit Statistics ====== PI: 50 PO: 22 Gate: 1719 Stem: 605 Level: 14 ================================ [SOL] flip: 0, stem: 0, fault:7212. flip_cnt: 0, stem_cnt: 605, fault_cnt:384 coverage: 11.169% pattern: 1 before: 3438 now: 3054 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:6802. flip_cnt: 0, stem_cnt: 605, fault_cnt:474 coverage: 21.582% pattern: 2 before: 3054 now: 2696 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:4900. flip_cnt: 0, stem_cnt: 605, fault_cnt:409 coverage: 29.145% pattern: 3 before: 2696 now: 2436 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:3097. flip_cnt: 0, stem_cnt: 605, fault_cnt:348 coverage: 33.973% pattern: 4 before: 2436 now: 2270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:3420. flip_cnt: 0, stem_cnt: 605, fault_cnt:414 coverage: 39.209% pattern: 5 before: 2270 now: 2090 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:2812. flip_cnt: 0, stem_cnt: 605, fault_cnt:376 coverage: 43.514% pattern: 6 before: 2090 now: 1942 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1577. flip_cnt: 0, stem_cnt: 605, fault_cnt:383 coverage: 45.928% pattern: 7 before: 1942 now: 1859 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:3230. flip_cnt: 0, stem_cnt: 605, fault_cnt:589 coverage: 50.873% pattern: 8 before: 1859 now: 1689 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1178. flip_cnt: 0, stem_cnt: 605, fault_cnt:360 coverage: 52.676% pattern: 9 before: 1689 now: 1627 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:163 coverage: 52.967% pattern: 10 before: 1627 now: 1617 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:2052. flip_cnt: 0, stem_cnt: 605, fault_cnt:557 coverage: 56.108% pattern: 11 before: 1617 now: 1509 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:608. flip_cnt: 0, stem_cnt: 605, fault_cnt:462 coverage: 57.039% pattern: 12 before: 1509 now: 1477 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1045. flip_cnt: 0, stem_cnt: 605, fault_cnt:496 coverage: 58.639% pattern: 13 before: 1477 now: 1422 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1349. flip_cnt: 0, stem_cnt: 605, fault_cnt:569 coverage: 60.704% pattern: 14 before: 1422 now: 1351 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:646. flip_cnt: 0, stem_cnt: 605, fault_cnt:336 coverage: 61.693% pattern: 15 before: 1351 now: 1317 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:893. flip_cnt: 0, stem_cnt: 605, fault_cnt:571 coverage: 63.060% pattern: 16 before: 1317 now: 1270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:646. flip_cnt: 0, stem_cnt: 605, fault_cnt:513 coverage: 64.049% pattern: 17 before: 1270 now: 1236 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:323. flip_cnt: 0, stem_cnt: 605, fault_cnt:452 coverage: 64.543% pattern: 18 before: 1236 now: 1219 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:499 coverage: 64.660% pattern: 19 before: 1219 now: 1215 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:722. flip_cnt: 0, stem_cnt: 605, fault_cnt:482 coverage: 65.765% pattern: 20 before: 1215 now: 1177 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:665. flip_cnt: 0, stem_cnt: 605, fault_cnt:421 coverage: 66.783% pattern: 21 before: 1177 now: 1142 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:494. flip_cnt: 0, stem_cnt: 605, fault_cnt:479 coverage: 67.539% pattern: 22 before: 1142 now: 1116 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:627. flip_cnt: 0, stem_cnt: 605, fault_cnt:438 coverage: 68.499% pattern: 23 before: 1116 now: 1083 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:608. flip_cnt: 0, stem_cnt: 605, fault_cnt:419 coverage: 69.430% pattern: 24 before: 1083 now: 1051 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 605, fault_cnt:515 coverage: 69.663% pattern: 25 before: 1051 now: 1043 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1938. flip_cnt: 0, stem_cnt: 605, fault_cnt:636 coverage: 72.629% pattern: 26 before: 1043 now: 941 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:294 coverage: 72.717% pattern: 27 before: 941 now: 938 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 605, fault_cnt:487 coverage: 73.269% pattern: 28 before: 938 now: 919 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:722. flip_cnt: 0, stem_cnt: 605, fault_cnt:607 coverage: 74.375% pattern: 29 before: 919 now: 881 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:504 coverage: 74.520% pattern: 30 before: 881 now: 876 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 605, fault_cnt:506 coverage: 74.724% pattern: 31 before: 876 now: 869 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 605, fault_cnt:383 coverage: 74.898% pattern: 32 before: 869 now: 863 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:558 coverage: 74.927% pattern: 33 before: 863 now: 862 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:382 coverage: 74.927% pattern: 33 before: 862 now: 862 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:475 coverage: 74.927% pattern: 33 before: 862 now: 862 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:1302. flip_cnt: 0, stem_cnt: 605, fault_cnt:472 coverage: 76.934% pattern: 34 before: 862 now: 793 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:429 coverage: 76.934% pattern: 34 before: 793 now: 793 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:418. flip_cnt: 0, stem_cnt: 605, fault_cnt:445 coverage: 77.574% pattern: 35 before: 793 now: 771 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 605, fault_cnt:441 coverage: 77.923% pattern: 36 before: 771 now: 759 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:212 coverage: 77.952% pattern: 37 before: 759 now: 758 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 605, fault_cnt:531 coverage: 78.418% pattern: 38 before: 758 now: 742 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 605, fault_cnt:482 coverage: 78.883% pattern: 39 before: 742 now: 726 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:540 coverage: 78.999% pattern: 40 before: 726 now: 722 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:523 coverage: 78.999% pattern: 40 before: 722 now: 722 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 605, fault_cnt:463 coverage: 79.407% pattern: 41 before: 722 now: 708 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 605, fault_cnt:474 coverage: 79.959% pattern: 42 before: 708 now: 689 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:488 coverage: 79.959% pattern: 42 before: 689 now: 689 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:269 coverage: 79.959% pattern: 42 before: 689 now: 689 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:582 coverage: 80.076% pattern: 43 before: 689 now: 685 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 605, fault_cnt:329 coverage: 80.279% pattern: 44 before: 685 now: 678 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:627. flip_cnt: 0, stem_cnt: 605, fault_cnt:606 coverage: 81.239% pattern: 45 before: 678 now: 645 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 605, fault_cnt:390 coverage: 81.559% pattern: 46 before: 645 now: 634 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:403 coverage: 81.646% pattern: 47 before: 634 now: 631 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:470 coverage: 81.646% pattern: 47 before: 631 now: 631 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 605, fault_cnt:539 coverage: 82.112% pattern: 48 before: 631 now: 615 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:502 coverage: 82.112% pattern: 48 before: 615 now: 615 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 605, fault_cnt:489 coverage: 82.490% pattern: 49 before: 615 now: 602 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 605, fault_cnt:463 coverage: 82.839% pattern: 50 before: 602 now: 590 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:381 coverage: 82.868% pattern: 51 before: 590 now: 589 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:497 coverage: 82.868% pattern: 51 before: 589 now: 589 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:536 coverage: 82.868% pattern: 51 before: 589 now: 589 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:477 coverage: 82.868% pattern: 51 before: 589 now: 589 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:505 coverage: 82.868% pattern: 51 before: 589 now: 589 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:410 coverage: 83.159% pattern: 52 before: 589 now: 579 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 605, fault_cnt:573 coverage: 83.741% pattern: 53 before: 579 now: 559 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:495 coverage: 83.741% pattern: 53 before: 559 now: 559 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:620 coverage: 83.857% pattern: 54 before: 559 now: 555 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:393 coverage: 83.857% pattern: 54 before: 555 now: 555 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:441 coverage: 83.915% pattern: 55 before: 555 now: 553 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 605, fault_cnt:573 coverage: 84.148% pattern: 56 before: 553 now: 545 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:261 coverage: 84.177% pattern: 57 before: 545 now: 544 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 605, fault_cnt:527 coverage: 84.729% pattern: 58 before: 544 now: 525 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:300 coverage: 84.759% pattern: 59 before: 525 now: 524 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:566 coverage: 84.759% pattern: 59 before: 524 now: 524 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:571 coverage: 84.759% pattern: 59 before: 524 now: 524 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:357 coverage: 84.846% pattern: 60 before: 524 now: 521 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:511 coverage: 84.846% pattern: 60 before: 521 now: 521 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:506 coverage: 84.846% pattern: 60 before: 521 now: 521 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:588 coverage: 84.846% pattern: 60 before: 521 now: 521 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:528 coverage: 84.846% pattern: 60 before: 521 now: 521 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:567 coverage: 84.846% pattern: 60 before: 521 now: 521 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:454 coverage: 84.875% pattern: 61 before: 521 now: 520 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:474 coverage: 84.991% pattern: 62 before: 520 now: 516 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:530 coverage: 85.020% pattern: 63 before: 516 now: 515 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512 coverage: 85.020% pattern: 63 before: 515 now: 515 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:393 coverage: 85.020% pattern: 63 before: 515 now: 515 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:496 coverage: 85.311% pattern: 64 before: 515 now: 505 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:596 coverage: 85.340% pattern: 65 before: 505 now: 504 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:518 coverage: 85.340% pattern: 65 before: 504 now: 504 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:461 coverage: 85.369% pattern: 66 before: 504 now: 503 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:468 coverage: 85.515% pattern: 67 before: 503 now: 498 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:431 coverage: 85.573% pattern: 68 before: 498 now: 496 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 605, fault_cnt:440 coverage: 85.777% pattern: 69 before: 496 now: 489 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:655 coverage: 85.864% pattern: 70 before: 489 now: 486 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:468 coverage: 85.864% pattern: 70 before: 486 now: 486 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 605, fault_cnt:487 coverage: 86.446% pattern: 71 before: 486 now: 466 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:341 coverage: 86.446% pattern: 71 before: 466 now: 466 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 605, fault_cnt:420 coverage: 86.998% pattern: 72 before: 466 now: 447 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:510 coverage: 87.056% pattern: 73 before: 447 now: 445 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:509 coverage: 87.056% pattern: 73 before: 445 now: 445 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:442 coverage: 87.086% pattern: 74 before: 445 now: 444 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:339 coverage: 87.086% pattern: 74 before: 444 now: 444 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:468 coverage: 87.086% pattern: 74 before: 444 now: 444 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:261 coverage: 87.086% pattern: 74 before: 444 now: 444 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:492 coverage: 87.086% pattern: 74 before: 444 now: 444 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:499 coverage: 87.086% pattern: 74 before: 444 now: 444 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:530 coverage: 87.086% pattern: 74 before: 444 now: 444 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:516 coverage: 87.086% pattern: 74 before: 444 now: 444 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:533 coverage: 87.202% pattern: 75 before: 444 now: 440 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:607 coverage: 87.260% pattern: 76 before: 440 now: 438 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:391 coverage: 87.318% pattern: 77 before: 438 now: 436 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:418 coverage: 87.376% pattern: 78 before: 436 now: 434 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:494 coverage: 87.376% pattern: 78 before: 434 now: 434 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:357 coverage: 87.405% pattern: 79 before: 434 now: 433 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:424 coverage: 87.435% pattern: 80 before: 433 now: 432 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:546 coverage: 87.435% pattern: 80 before: 432 now: 432 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:371 coverage: 87.464% pattern: 81 before: 432 now: 431 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:311 coverage: 87.464% pattern: 81 before: 431 now: 431 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:426 coverage: 87.493% pattern: 82 before: 431 now: 430 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:435 coverage: 87.551% pattern: 83 before: 430 now: 428 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:525 coverage: 87.551% pattern: 83 before: 428 now: 428 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:401 coverage: 87.696% pattern: 84 before: 428 now: 423 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:547 coverage: 87.696% pattern: 84 before: 423 now: 423 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:358 coverage: 87.725% pattern: 85 before: 423 now: 422 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:403 coverage: 87.725% pattern: 85 before: 422 now: 422 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512 coverage: 87.725% pattern: 85 before: 422 now: 422 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:412 coverage: 87.725% pattern: 85 before: 422 now: 422 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:381 coverage: 87.842% pattern: 86 before: 422 now: 418 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:435 coverage: 87.900% pattern: 87 before: 418 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:507 coverage: 87.900% pattern: 87 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:540 coverage: 87.900% pattern: 87 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:557 coverage: 87.900% pattern: 87 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:208 coverage: 87.900% pattern: 87 before: 416 now: 416 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:460 coverage: 87.958% pattern: 88 before: 416 now: 414 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:534 coverage: 87.958% pattern: 88 before: 414 now: 414 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:331 coverage: 87.958% pattern: 88 before: 414 now: 414 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 605, fault_cnt:610 coverage: 88.220% pattern: 89 before: 414 now: 405 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:395 coverage: 88.220% pattern: 89 before: 405 now: 405 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:490 coverage: 88.220% pattern: 89 before: 405 now: 405 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:466 coverage: 88.220% pattern: 89 before: 405 now: 405 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:525 coverage: 88.220% pattern: 89 before: 405 now: 405 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:411 coverage: 88.220% pattern: 89 before: 405 now: 405 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:488 coverage: 88.278% pattern: 90 before: 405 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:508 coverage: 88.278% pattern: 90 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:369 coverage: 88.278% pattern: 90 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:508 coverage: 88.278% pattern: 90 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:474 coverage: 88.278% pattern: 90 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:401 coverage: 88.278% pattern: 90 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:464 coverage: 88.278% pattern: 90 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:541 coverage: 88.278% pattern: 90 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:514 coverage: 88.278% pattern: 90 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:380 coverage: 88.278% pattern: 90 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:401 coverage: 88.278% pattern: 90 before: 403 now: 403 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:411 coverage: 88.307% pattern: 91 before: 403 now: 402 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:407 coverage: 88.307% pattern: 91 before: 402 now: 402 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:408 coverage: 88.365% pattern: 92 before: 402 now: 400 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:531 coverage: 88.365% pattern: 92 before: 400 now: 400 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:561 coverage: 88.424% pattern: 93 before: 400 now: 398 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:389 coverage: 88.540% pattern: 94 before: 398 now: 394 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:433 coverage: 88.540% pattern: 94 before: 394 now: 394 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:424 coverage: 88.685% pattern: 95 before: 394 now: 389 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:504 coverage: 88.685% pattern: 95 before: 389 now: 389 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:372 coverage: 88.685% pattern: 95 before: 389 now: 389 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:506 coverage: 88.685% pattern: 95 before: 389 now: 389 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:574 coverage: 88.685% pattern: 95 before: 389 now: 389 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:460 coverage: 88.685% pattern: 95 before: 389 now: 389 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:349 coverage: 88.685% pattern: 95 before: 389 now: 389 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:277 coverage: 88.685% pattern: 95 before: 389 now: 389 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:377 coverage: 88.976% pattern: 96 before: 389 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:491 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:531 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:327 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:484 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:442 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:402 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:488 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:349 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:507 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:220 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:451 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:330 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:487 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:442 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:565 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:376 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:568 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:426 coverage: 88.976% pattern: 96 before: 379 now: 379 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:465 coverage: 89.005% pattern: 97 before: 379 now: 378 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:522 coverage: 89.005% pattern: 97 before: 378 now: 378 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:543 coverage: 89.005% pattern: 97 before: 378 now: 378 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:403 coverage: 89.092% pattern: 98 before: 378 now: 375 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:284 coverage: 89.092% pattern: 98 before: 375 now: 375 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:427 coverage: 89.092% pattern: 98 before: 375 now: 375 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:440 coverage: 89.151% pattern: 99 before: 375 now: 373 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:481 coverage: 89.151% pattern: 99 before: 373 now: 373 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 605, fault_cnt:632 coverage: 89.500% pattern: 100 before: 373 now: 361 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:353 coverage: 89.529% pattern: 101 before: 361 now: 360 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:470 coverage: 89.529% pattern: 101 before: 360 now: 360 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:358 coverage: 89.529% pattern: 101 before: 360 now: 360 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:423 coverage: 89.529% pattern: 101 before: 360 now: 360 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:516 coverage: 89.645% pattern: 102 before: 360 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:484 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:508 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:445 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:484 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:406 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:301 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:435 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:555 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:444 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:283 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:335 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:503 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:568 coverage: 89.645% pattern: 102 before: 356 now: 356 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:503 coverage: 89.703% pattern: 103 before: 356 now: 354 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:499 coverage: 89.703% pattern: 103 before: 354 now: 354 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:522 coverage: 89.703% pattern: 103 before: 354 now: 354 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:480 coverage: 89.703% pattern: 103 before: 354 now: 354 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:387 coverage: 89.820% pattern: 104 before: 354 now: 350 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:496 coverage: 89.820% pattern: 104 before: 350 now: 350 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:461 coverage: 89.820% pattern: 104 before: 350 now: 350 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:577 coverage: 89.849% pattern: 105 before: 350 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:270 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:479 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:494 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:544 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:521 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:369 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:634 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:480 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:444 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:463 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:541 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:573 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:504 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:560 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:493 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:370 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:393 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:396 coverage: 89.849% pattern: 105 before: 349 now: 349 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:439 coverage: 89.965% pattern: 106 before: 349 now: 345 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:515 coverage: 89.965% pattern: 106 before: 345 now: 345 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:471 coverage: 89.965% pattern: 106 before: 345 now: 345 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:496 coverage: 90.081% pattern: 107 before: 345 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:381 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:528 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:283 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:537 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:625 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:581 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:495 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:456 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:504 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:486 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:523 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:457 coverage: 90.081% pattern: 107 before: 341 now: 341 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 605, fault_cnt:420 coverage: 90.343% pattern: 108 before: 341 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:458 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:418 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:395 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:470 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:436 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:453 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:480 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:432 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:330 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:477 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:441 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:493 coverage: 90.343% pattern: 108 before: 332 now: 332 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:386 coverage: 90.634% pattern: 109 before: 332 now: 322 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 605, fault_cnt:490 coverage: 91.012% pattern: 110 before: 322 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:510 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:451 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:542 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:464 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:556 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:468 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:516 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:276 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:294 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:441 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:559 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:365 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:438 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:407 coverage: 91.012% pattern: 110 before: 309 now: 309 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 605, fault_cnt:417 coverage: 91.245% pattern: 111 before: 309 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:389 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:483 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:383 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:533 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:466 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:255 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:525 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:363 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:519 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:323 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:325 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:445 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:441 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:504 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:542 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:333 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:284 coverage: 91.245% pattern: 111 before: 301 now: 301 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:313 coverage: 91.274% pattern: 112 before: 301 now: 300 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:533 coverage: 91.274% pattern: 112 before: 300 now: 300 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:456 coverage: 91.332% pattern: 113 before: 300 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:330 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:495 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:481 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:600 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:534 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:486 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:461 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:266 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:398 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:565 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:446 coverage: 91.332% pattern: 113 before: 298 now: 298 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:448 coverage: 91.449% pattern: 114 before: 298 now: 294 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:521 coverage: 91.449% pattern: 114 before: 294 now: 294 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:372 coverage: 91.536% pattern: 115 before: 294 now: 291 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:467 coverage: 91.536% pattern: 115 before: 291 now: 291 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:511 coverage: 91.536% pattern: 115 before: 291 now: 291 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:561 coverage: 91.536% pattern: 115 before: 291 now: 291 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:327 coverage: 91.536% pattern: 115 before: 291 now: 291 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:247. flip_cnt: 0, stem_cnt: 605, fault_cnt:260 coverage: 91.914% pattern: 116 before: 291 now: 278 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:551 coverage: 91.914% pattern: 116 before: 278 now: 278 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:333 coverage: 91.914% pattern: 116 before: 278 now: 278 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:497 coverage: 91.914% pattern: 116 before: 278 now: 278 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:481 coverage: 91.914% pattern: 116 before: 278 now: 278 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:390 coverage: 91.914% pattern: 116 before: 278 now: 278 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:432 coverage: 91.914% pattern: 116 before: 278 now: 278 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:568 coverage: 91.914% pattern: 116 before: 278 now: 278 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:482 coverage: 91.914% pattern: 116 before: 278 now: 278 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:470 coverage: 91.914% pattern: 116 before: 278 now: 278 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:423 coverage: 91.972% pattern: 117 before: 278 now: 276 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:475 coverage: 91.972% pattern: 117 before: 276 now: 276 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:541 coverage: 91.972% pattern: 117 before: 276 now: 276 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:569 coverage: 91.972% pattern: 117 before: 276 now: 276 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:493 coverage: 91.972% pattern: 117 before: 276 now: 276 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:490 coverage: 91.972% pattern: 117 before: 276 now: 276 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:605 coverage: 91.972% pattern: 117 before: 276 now: 276 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:493 coverage: 91.972% pattern: 117 before: 276 now: 276 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:451 coverage: 92.118% pattern: 118 before: 276 now: 271 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:482 coverage: 92.147% pattern: 119 before: 271 now: 270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:415 coverage: 92.147% pattern: 119 before: 270 now: 270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:575 coverage: 92.147% pattern: 119 before: 270 now: 270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:526 coverage: 92.147% pattern: 119 before: 270 now: 270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:241 coverage: 92.147% pattern: 119 before: 270 now: 270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:365 coverage: 92.147% pattern: 119 before: 270 now: 270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:509 coverage: 92.147% pattern: 119 before: 270 now: 270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:461 coverage: 92.147% pattern: 119 before: 270 now: 270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:521 coverage: 92.147% pattern: 119 before: 270 now: 270 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:391 coverage: 92.292% pattern: 120 before: 270 now: 265 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:538 coverage: 92.350% pattern: 121 before: 265 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:452 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:530 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:559 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:534 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:306 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:246 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:152 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:550 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:506 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:501 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512 coverage: 92.350% pattern: 121 before: 263 now: 263 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:390 coverage: 92.467% pattern: 122 before: 263 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:490 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:500 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:499 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:466 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:476 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:465 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:498 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:399 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:514 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:457 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:556 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:590 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:348 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:519 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:440 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:485 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:324 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:505 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:525 coverage: 92.467% pattern: 122 before: 259 now: 259 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:469 coverage: 92.583% pattern: 123 before: 259 now: 255 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:517 coverage: 92.583% pattern: 123 before: 255 now: 255 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:540 coverage: 92.583% pattern: 123 before: 255 now: 255 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:295 coverage: 92.583% pattern: 123 before: 255 now: 255 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:312 coverage: 92.583% pattern: 123 before: 255 now: 255 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:518 coverage: 92.583% pattern: 123 before: 255 now: 255 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:445 coverage: 92.641% pattern: 124 before: 255 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:507 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:402 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:511 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:491 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:406 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:448 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:338 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:540 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:526 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:359 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:524 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:455 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:295 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:601 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:529 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:329 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:423 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:455 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:480 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:359 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:493 coverage: 92.641% pattern: 124 before: 253 now: 253 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 605, fault_cnt:516 coverage: 92.816% pattern: 125 before: 253 now: 247 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:496 coverage: 92.816% pattern: 125 before: 247 now: 247 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:509 coverage: 92.816% pattern: 125 before: 247 now: 247 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:465 coverage: 92.816% pattern: 125 before: 247 now: 247 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:522 coverage: 92.816% pattern: 125 before: 247 now: 247 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:491 coverage: 92.816% pattern: 125 before: 247 now: 247 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:432 coverage: 92.932% pattern: 126 before: 247 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:530 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:541 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:526 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:577 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:389 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:453 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:454 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:522 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:344 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:313 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:448 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1. [SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:565 coverage: 92.932% pattern: 126 before: 243 now: 243 checking valid circuit ... result: 1.