atpg-ls/exp_result/ATPG-LS_c1908.bench.txt
2023-03-09 13:17:53 +08:00

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make: 'atpg' is up to date.
========================
parsing file ./benchmark/c1908.bench ... Done.
====== Circuit Statistics ======
PI: 33
PO: 25
Gate: 913
Stem: 410
Level: 12
================================
[SOL] flip: 0, stem: 0, fault:9429. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 27.273% pattern: 1 before: 1826 now: 1328
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:5572. flip_cnt: 0, stem_cnt: 410, fault_cnt:451
coverage: 46.440% pattern: 2 before: 1328 now: 978
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:2452. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 53.560% pattern: 3 before: 978 now: 848
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:437. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 54.819% pattern: 4 before: 848 now: 825
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:1235. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 58.379% pattern: 5 before: 825 now: 760
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 58.817% pattern: 6 before: 760 now: 752
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:836. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 61.227% pattern: 7 before: 752 now: 708
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:1045. flip_cnt: 0, stem_cnt: 410, fault_cnt:567
coverage: 64.239% pattern: 8 before: 708 now: 653
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:343. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 65.279% pattern: 9 before: 653 now: 634
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 410, fault_cnt:460
coverage: 65.717% pattern: 10 before: 634 now: 626
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:463
coverage: 65.882% pattern: 11 before: 626 now: 623
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 66.101% pattern: 12 before: 623 now: 619
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 66.320% pattern: 13 before: 619 now: 615
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 66.539% pattern: 14 before: 615 now: 611
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 66.594% pattern: 15 before: 611 now: 610
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 66.703% pattern: 16 before: 610 now: 608
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 66.703% pattern: 16 before: 608 now: 608
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 66.813% pattern: 17 before: 608 now: 606
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 66.813% pattern: 17 before: 606 now: 606
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:463
coverage: 67.032% pattern: 18 before: 606 now: 602
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 67.032% pattern: 18 before: 602 now: 602
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 67.032% pattern: 18 before: 602 now: 602
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 67.251% pattern: 19 before: 602 now: 598
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446
coverage: 67.251% pattern: 19 before: 598 now: 598
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463
coverage: 67.251% pattern: 19 before: 598 now: 598
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456
coverage: 67.251% pattern: 19 before: 598 now: 598
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:2736. flip_cnt: 0, stem_cnt: 410, fault_cnt:640
coverage: 75.137% pattern: 20 before: 598 now: 454
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469
coverage: 75.137% pattern: 20 before: 454 now: 454
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 75.137% pattern: 20 before: 454 now: 454
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 75.137% pattern: 20 before: 454 now: 454
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 75.137% pattern: 20 before: 454 now: 454
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 75.246% pattern: 21 before: 454 now: 452
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232
coverage: 75.246% pattern: 21 before: 452 now: 452
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 75.246% pattern: 21 before: 452 now: 452
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139
coverage: 75.246% pattern: 21 before: 452 now: 452
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 75.246% pattern: 21 before: 452 now: 452
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 75.246% pattern: 21 before: 452 now: 452
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 75.465% pattern: 22 before: 452 now: 448
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 75.465% pattern: 22 before: 448 now: 448
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 75.520% pattern: 23 before: 448 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 75.520% pattern: 23 before: 447 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234
coverage: 75.520% pattern: 23 before: 447 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 75.520% pattern: 23 before: 447 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531
coverage: 75.520% pattern: 23 before: 447 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 75.520% pattern: 23 before: 447 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 75.520% pattern: 23 before: 447 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 75.520% pattern: 23 before: 447 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 75.520% pattern: 23 before: 447 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 75.520% pattern: 23 before: 447 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 75.520% pattern: 23 before: 447 now: 447
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 410, fault_cnt:172
coverage: 76.616% pattern: 24 before: 447 now: 427
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 76.616% pattern: 24 before: 427 now: 427
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 76.616% pattern: 24 before: 427 now: 427
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141
coverage: 76.616% pattern: 24 before: 427 now: 427
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 76.616% pattern: 24 before: 427 now: 427
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 76.616% pattern: 24 before: 427 now: 427
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 76.616% pattern: 24 before: 427 now: 427
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 76.670% pattern: 25 before: 427 now: 426
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141
coverage: 76.670% pattern: 25 before: 426 now: 426
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 76.670% pattern: 25 before: 426 now: 426
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 76.670% pattern: 25 before: 426 now: 426
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 76.670% pattern: 25 before: 426 now: 426
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 76.670% pattern: 25 before: 426 now: 426
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:950. flip_cnt: 0, stem_cnt: 410, fault_cnt:658
coverage: 79.409% pattern: 26 before: 426 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:554
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 79.409% pattern: 26 before: 376 now: 376
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 79.518% pattern: 27 before: 376 now: 374
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 410, fault_cnt:540
coverage: 80.504% pattern: 28 before: 374 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 80.504% pattern: 28 before: 356 now: 356
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 80.559% pattern: 29 before: 356 now: 355
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 80.559% pattern: 29 before: 355 now: 355
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 80.559% pattern: 29 before: 355 now: 355
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 80.559% pattern: 29 before: 355 now: 355
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:969. flip_cnt: 0, stem_cnt: 410, fault_cnt:628
coverage: 83.352% pattern: 30 before: 355 now: 304
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 83.352% pattern: 30 before: 304 now: 304
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 83.680% pattern: 31 before: 304 now: 298
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470
coverage: 83.680% pattern: 31 before: 298 now: 298
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 410, fault_cnt:629
coverage: 84.666% pattern: 32 before: 298 now: 280
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 84.666% pattern: 32 before: 280 now: 280
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 84.666% pattern: 32 before: 280 now: 280
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 84.666% pattern: 32 before: 280 now: 280
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 84.666% pattern: 32 before: 280 now: 280
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461
coverage: 84.666% pattern: 32 before: 280 now: 280
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 84.666% pattern: 32 before: 280 now: 280
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 84.666% pattern: 32 before: 280 now: 280
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 84.666% pattern: 32 before: 280 now: 280
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461
coverage: 84.666% pattern: 32 before: 280 now: 280
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 85.049% pattern: 33 before: 280 now: 273
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 85.049% pattern: 33 before: 273 now: 273
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247
coverage: 85.049% pattern: 33 before: 273 now: 273
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 85.049% pattern: 33 before: 273 now: 273
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:557
coverage: 85.104% pattern: 34 before: 273 now: 272
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 85.104% pattern: 34 before: 272 now: 272
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 85.104% pattern: 34 before: 272 now: 272
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:481
coverage: 85.159% pattern: 35 before: 272 now: 271
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 85.159% pattern: 35 before: 271 now: 271
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 85.487% pattern: 36 before: 271 now: 265
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 410, fault_cnt:595
coverage: 85.761% pattern: 37 before: 265 now: 260
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 85.761% pattern: 37 before: 260 now: 260
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 85.761% pattern: 37 before: 260 now: 260
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 85.761% pattern: 37 before: 260 now: 260
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200
coverage: 85.761% pattern: 37 before: 260 now: 260
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 85.761% pattern: 37 before: 260 now: 260
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460
coverage: 85.761% pattern: 37 before: 260 now: 260
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454
coverage: 85.761% pattern: 37 before: 260 now: 260
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:538
coverage: 85.871% pattern: 38 before: 260 now: 258
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 85.871% pattern: 38 before: 258 now: 258
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:893. flip_cnt: 0, stem_cnt: 410, fault_cnt:651
coverage: 88.445% pattern: 39 before: 258 now: 211
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:556
coverage: 88.664% pattern: 40 before: 211 now: 207
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 88.664% pattern: 40 before: 207 now: 207
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 88.664% pattern: 40 before: 207 now: 207
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 88.664% pattern: 40 before: 207 now: 207
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 88.664% pattern: 40 before: 207 now: 207
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 88.664% pattern: 40 before: 207 now: 207
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532
coverage: 88.664% pattern: 40 before: 207 now: 207
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:567
coverage: 88.883% pattern: 41 before: 207 now: 203
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 88.883% pattern: 41 before: 203 now: 203
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452
coverage: 88.883% pattern: 41 before: 203 now: 203
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 88.883% pattern: 41 before: 203 now: 203
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 88.883% pattern: 41 before: 203 now: 203
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527
coverage: 88.883% pattern: 41 before: 203 now: 203
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 88.883% pattern: 41 before: 203 now: 203
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 88.883% pattern: 41 before: 203 now: 203
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 88.883% pattern: 41 before: 203 now: 203
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:582
coverage: 88.992% pattern: 42 before: 203 now: 201
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 88.992% pattern: 42 before: 201 now: 201
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 88.992% pattern: 42 before: 201 now: 201
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143
coverage: 88.992% pattern: 42 before: 201 now: 201
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 88.992% pattern: 42 before: 201 now: 201
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 88.992% pattern: 42 before: 201 now: 201
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 88.992% pattern: 42 before: 201 now: 201
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462
coverage: 88.992% pattern: 42 before: 201 now: 201
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:542
coverage: 88.992% pattern: 42 before: 201 now: 201
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 410, fault_cnt:220
coverage: 89.430% pattern: 43 before: 201 now: 193
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 89.430% pattern: 43 before: 193 now: 193
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 89.430% pattern: 43 before: 193 now: 193
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:568
coverage: 89.595% pattern: 44 before: 193 now: 190
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529
coverage: 89.595% pattern: 44 before: 190 now: 190
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 89.595% pattern: 44 before: 190 now: 190
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 89.595% pattern: 44 before: 190 now: 190
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:589
coverage: 89.704% pattern: 45 before: 190 now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 89.704% pattern: 45 before: 188 now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:227
coverage: 89.704% pattern: 45 before: 188 now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 89.704% pattern: 45 before: 188 now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 89.704% pattern: 45 before: 188 now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 89.704% pattern: 45 before: 188 now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 89.704% pattern: 45 before: 188 now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 89.704% pattern: 45 before: 188 now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 89.704% pattern: 45 before: 188 now: 188
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 410, fault_cnt:623
coverage: 90.307% pattern: 46 before: 188 now: 177
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 90.307% pattern: 46 before: 177 now: 177
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 90.307% pattern: 46 before: 177 now: 177
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 90.307% pattern: 46 before: 177 now: 177
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:568
coverage: 90.307% pattern: 46 before: 177 now: 177
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470
coverage: 90.307% pattern: 46 before: 177 now: 177
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 90.307% pattern: 46 before: 177 now: 177
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480
coverage: 90.307% pattern: 46 before: 177 now: 177
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484
coverage: 90.307% pattern: 46 before: 177 now: 177
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524
coverage: 90.307% pattern: 46 before: 177 now: 177
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:418. flip_cnt: 0, stem_cnt: 410, fault_cnt:549
coverage: 91.512% pattern: 47 before: 177 now: 155
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 91.512% pattern: 47 before: 155 now: 155
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:566
coverage: 91.512% pattern: 47 before: 155 now: 155
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 91.512% pattern: 47 before: 155 now: 155
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 91.512% pattern: 47 before: 155 now: 155
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 91.512% pattern: 47 before: 155 now: 155
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 91.512% pattern: 47 before: 155 now: 155
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 91.731% pattern: 48 before: 155 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458
coverage: 91.731% pattern: 48 before: 151 now: 151
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:591
coverage: 91.785% pattern: 49 before: 151 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:592
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:251
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 91.785% pattern: 49 before: 150 now: 150
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:421. flip_cnt: 0, stem_cnt: 410, fault_cnt:585
coverage: 93.154% pattern: 50 before: 150 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:590
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:535
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:438
coverage: 93.154% pattern: 50 before: 125 now: 125
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:585
coverage: 93.209% pattern: 51 before: 125 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:588
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 93.209% pattern: 51 before: 124 now: 124
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:563
coverage: 93.373% pattern: 52 before: 124 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:621
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:649
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 93.373% pattern: 52 before: 121 now: 121
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:617
coverage: 93.593% pattern: 53 before: 121 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:599
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:440
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:249
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 93.593% pattern: 53 before: 117 now: 117
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:596
coverage: 93.757% pattern: 54 before: 117 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:645
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:206
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:225
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 93.757% pattern: 54 before: 114 now: 114
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:530
coverage: 93.866% pattern: 55 before: 114 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 93.866% pattern: 55 before: 112 now: 112
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 94.031% pattern: 56 before: 112 now: 109
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 94.031% pattern: 56 before: 109 now: 109
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 94.031% pattern: 56 before: 109 now: 109
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 94.031% pattern: 56 before: 109 now: 109
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 94.031% pattern: 56 before: 109 now: 109
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:181
coverage: 94.031% pattern: 56 before: 109 now: 109
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:554
coverage: 94.031% pattern: 56 before: 109 now: 109
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 94.031% pattern: 56 before: 109 now: 109
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246
coverage: 94.031% pattern: 56 before: 109 now: 109
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 94.031% pattern: 56 before: 109 now: 109
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:176
coverage: 94.085% pattern: 57 before: 109 now: 108
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 94.085% pattern: 57 before: 108 now: 108
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:579
coverage: 94.085% pattern: 57 before: 108 now: 108
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:633
coverage: 94.140% pattern: 58 before: 108 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:550
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:645
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:595
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:165
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:568
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:216
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:646
coverage: 94.140% pattern: 58 before: 107 now: 107
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:597
coverage: 94.359% pattern: 59 before: 107 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:573
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 94.359% pattern: 59 before: 103 now: 103
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:628
coverage: 94.578% pattern: 60 before: 103 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:539
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:559
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 94.578% pattern: 60 before: 99 now: 99
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:647
coverage: 94.797% pattern: 61 before: 99 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:584
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:128
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:586
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:591
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:635
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 94.797% pattern: 61 before: 95 now: 95
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:584
coverage: 95.016% pattern: 62 before: 95 now: 91
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480
coverage: 95.016% pattern: 62 before: 91 now: 91
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 95.016% pattern: 62 before: 91 now: 91
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:537
coverage: 95.235% pattern: 63 before: 91 now: 87
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:641
coverage: 95.235% pattern: 63 before: 87 now: 87
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 95.235% pattern: 63 before: 87 now: 87
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:630
coverage: 95.235% pattern: 63 before: 87 now: 87
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139
coverage: 95.235% pattern: 63 before: 87 now: 87
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 95.235% pattern: 63 before: 87 now: 87
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 95.235% pattern: 63 before: 87 now: 87
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:608
coverage: 95.235% pattern: 63 before: 87 now: 87
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 95.235% pattern: 63 before: 87 now: 87
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:642
coverage: 95.345% pattern: 64 before: 87 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:600
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:545
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 95.345% pattern: 64 before: 85 now: 85
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 410, fault_cnt:591
coverage: 95.783% pattern: 65 before: 85 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:634
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:165
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:246
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:583
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 95.783% pattern: 65 before: 77 now: 77
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 95.838% pattern: 66 before: 77 now: 76
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:537
coverage: 96.057% pattern: 67 before: 76 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:148
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:656
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:431
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:546
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 96.057% pattern: 67 before: 72 now: 72
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 410, fault_cnt:548
coverage: 96.386% pattern: 68 before: 72 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:634
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:562
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:539
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:580
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:181
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441
coverage: 96.386% pattern: 68 before: 66 now: 66
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:527
coverage: 96.440% pattern: 69 before: 66 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:204
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:209
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:593
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:567
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:202
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:558
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:634
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:219
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:250
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:646
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:437
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:626
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:132
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:624
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:599
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:251
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 96.440% pattern: 69 before: 65 now: 65
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:633
coverage: 96.659% pattern: 70 before: 65 now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 96.659% pattern: 70 before: 61 now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:628
coverage: 96.659% pattern: 70 before: 61 now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 96.659% pattern: 70 before: 61 now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:597
coverage: 96.659% pattern: 70 before: 61 now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 96.659% pattern: 70 before: 61 now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141
coverage: 96.659% pattern: 70 before: 61 now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 96.659% pattern: 70 before: 61 now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 96.659% pattern: 70 before: 61 now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 96.659% pattern: 70 before: 61 now: 61
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:272
coverage: 96.824% pattern: 71 before: 61 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:204
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:624
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:551
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:539
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:203
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:213
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:536
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:225
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:552
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:620
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:444
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:569
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457
coverage: 96.824% pattern: 71 before: 58 now: 58
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 96.933% pattern: 72 before: 58 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 96.933% pattern: 72 before: 56 now: 56
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:580
coverage: 96.988% pattern: 73 before: 56 now: 55
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 96.988% pattern: 73 before: 55 now: 55
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:587
coverage: 96.988% pattern: 73 before: 55 now: 55
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 96.988% pattern: 73 before: 55 now: 55
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 96.988% pattern: 73 before: 55 now: 55
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451
coverage: 96.988% pattern: 73 before: 55 now: 55
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.097% pattern: 74 before: 55 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:536
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.097% pattern: 74 before: 53 now: 53
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.207% pattern: 75 before: 53 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:627
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:632
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:433
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:650
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:541
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:251
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:202
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:583
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:176
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:544
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:547
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:217
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:580
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:651
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:634
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:220
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:588
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:588
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:571
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.207% pattern: 75 before: 51 now: 51
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:634
coverage: 97.317% pattern: 76 before: 51 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:555
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:588
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:602
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:574
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133
coverage: 97.317% pattern: 76 before: 49 now: 49
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:624
coverage: 97.426% pattern: 77 before: 49 now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 97.426% pattern: 77 before: 47 now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:164
coverage: 97.426% pattern: 77 before: 47 now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.426% pattern: 77 before: 47 now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 97.426% pattern: 77 before: 47 now: 47
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:638
coverage: 97.645% pattern: 78 before: 47 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:624
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:181
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.645% pattern: 78 before: 43 now: 43
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:534
coverage: 97.700% pattern: 79 before: 43 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:568
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:211
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:560
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:575
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:575
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:212
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:641
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:569
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.700% pattern: 79 before: 42 now: 42
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:271
coverage: 97.809% pattern: 80 before: 42 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:634
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:538
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:638
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:556
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:579
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:553
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:634
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:179
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:439
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:658
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:230
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:652
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:559
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:576
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:569
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:230
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:549
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:567
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:541
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.809% pattern: 80 before: 40 now: 40
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:646
coverage: 97.919% pattern: 81 before: 40 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:444
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:551
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:582
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:215
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:585
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:181
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:569
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:537
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:553
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:554
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:552
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:535
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:213
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:162
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:586
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:458
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:439
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:223
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:563
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:201
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:579
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:483
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:589
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:441
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 97.919% pattern: 81 before: 38 now: 38
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:644
coverage: 98.028% pattern: 82 before: 38 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:601
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:198
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:640
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:579
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:583
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:543
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:230
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:594
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:587
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:245
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:180
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:455
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:541
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:456
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:180
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:565
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:481
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:197
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:463
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:166
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:629
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:221
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:530
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:142
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:431
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:442
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:210
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:479
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:547
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:243
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:133
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 98.028% pattern: 82 before: 36 now: 36
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:222
coverage: 98.138% pattern: 83 before: 36 now: 34
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 98.138% pattern: 83 before: 34 now: 34
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 410, fault_cnt:631
coverage: 98.193% pattern: 84 before: 34 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:641
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:476
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:203
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:202
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 98.193% pattern: 84 before: 33 now: 33
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:573
coverage: 98.302% pattern: 85 before: 33 now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:568
coverage: 98.302% pattern: 85 before: 31 now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:461
coverage: 98.302% pattern: 85 before: 31 now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 98.302% pattern: 85 before: 31 now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.302% pattern: 85 before: 31 now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 98.302% pattern: 85 before: 31 now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 98.302% pattern: 85 before: 31 now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 98.302% pattern: 85 before: 31 now: 31
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:645
coverage: 98.412% pattern: 86 before: 31 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:636
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:577
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:180
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:478
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:565
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:485
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:632
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:490
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:250
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:464
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:638
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:450
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:164
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:585
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 98.412% pattern: 86 before: 29 now: 29
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:541
coverage: 98.576% pattern: 87 before: 29 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:213
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:449
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:247
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:652
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:580
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:459
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:529
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:549
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:462
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:223
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:634
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:471
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:589
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:231
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:438
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 98.576% pattern: 87 before: 26 now: 26
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 410, fault_cnt:270
coverage: 98.740% pattern: 88 before: 26 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:474
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:492
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:440
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:554
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:141
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:453
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:550
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:577
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:443
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:578
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:518
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:186
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:480
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:460
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:454
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:533
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:560
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:134
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:232
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 98.740% pattern: 88 before: 23 now: 23
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:563
coverage: 98.850% pattern: 89 before: 23 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:649
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:523
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:440
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:622
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:137
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:593
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:446
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:542
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:187
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:139
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:234
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:484
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:630
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:143
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:482
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:527
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:626
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:196
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 98.850% pattern: 89 before: 21 now: 21
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 410, fault_cnt:622
coverage: 99.069% pattern: 90 before: 21 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:451
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:150
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:526
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:470
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:639
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:230
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:230
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:513
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:472
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:136
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:517
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:610
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:609
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:448
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:512
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:493
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:199
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:652
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:183
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:193
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:241
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:556
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:558
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:522
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:494
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:496
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:242
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:233
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:574
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:525
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:138
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:591
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:244
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:222
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:521
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:491
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:473
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:546
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:184
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:504
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:140
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:195
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:468
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:640
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:528
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:447
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:457
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:465
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:452
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:531
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:466
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:218
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:469
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:467
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:237
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:475
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:135
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:564
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:509
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:581
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:516
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:511
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:514
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:507
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:144
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:488
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:477
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:506
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:240
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:549
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:497
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:191
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:500
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:236
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:557
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:508
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:445
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:189
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:495
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:501
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:515
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:532
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:239
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:502
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:194
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:235
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:571
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:498
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:182
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:145
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:505
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 99.069% pattern: 90 before: 17 now: 17
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 410, fault_cnt:640
coverage: 99.179% pattern: 91 before: 17 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:190
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:519
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:591
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:486
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:520
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:524
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:238
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:192
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:200
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:487
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:221
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:579
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:510
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:499
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:503
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:489
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:185
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 410, fault_cnt:188
coverage: 99.179% pattern: 91 before: 15 now: 15
checking valid circuit ... result: 1.