701 lines
37 KiB
Plaintext
701 lines
37 KiB
Plaintext
[H[2Jmake: 'atpg' is up to date.
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========================
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parsing file ./benchmark/c3540.bench ... Done.
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====== Circuit Statistics ======
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PI: 50
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PO: 22
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Gate: 1719
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Stem: 605
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Level: 14
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================================
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[SOL] flip: 0, stem: 0, fault:11041. flip_cnt: 0, stem_cnt: 605, fault_cnt:582
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coverage: 16.928% pattern: 1 before: 3438 now: 2856
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:7292. flip_cnt: 0, stem_cnt: 605, fault_cnt:477
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coverage: 28.272% pattern: 2 before: 2856 now: 2466
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:4577. flip_cnt: 0, stem_cnt: 605, fault_cnt:456
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coverage: 35.340% pattern: 3 before: 2466 now: 2223
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:3730. flip_cnt: 0, stem_cnt: 605, fault_cnt:535
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coverage: 41.245% pattern: 4 before: 2223 now: 2020
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:2679. flip_cnt: 0, stem_cnt: 605, fault_cnt:453
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coverage: 45.346% pattern: 5 before: 2020 now: 1879
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:5093. flip_cnt: 0, stem_cnt: 605, fault_cnt:658
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coverage: 53.170% pattern: 6 before: 1879 now: 1610
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:1026. flip_cnt: 0, stem_cnt: 605, fault_cnt:305
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coverage: 54.741% pattern: 7 before: 1610 now: 1556
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:418. flip_cnt: 0, stem_cnt: 605, fault_cnt:273
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coverage: 55.381% pattern: 8 before: 1556 now: 1534
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:1007. flip_cnt: 0, stem_cnt: 605, fault_cnt:396
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coverage: 56.923% pattern: 9 before: 1534 now: 1481
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:1672. flip_cnt: 0, stem_cnt: 605, fault_cnt:464
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coverage: 59.482% pattern: 10 before: 1481 now: 1393
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 605, fault_cnt:328
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coverage: 59.948% pattern: 11 before: 1393 now: 1377
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:1045. flip_cnt: 0, stem_cnt: 605, fault_cnt:364
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coverage: 61.547% pattern: 12 before: 1377 now: 1322
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:931. flip_cnt: 0, stem_cnt: 605, fault_cnt:435
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coverage: 62.973% pattern: 13 before: 1322 now: 1273
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:437. flip_cnt: 0, stem_cnt: 605, fault_cnt:506
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coverage: 63.642% pattern: 14 before: 1273 now: 1250
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 605, fault_cnt:304
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coverage: 64.107% pattern: 15 before: 1250 now: 1234
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:1843. flip_cnt: 0, stem_cnt: 605, fault_cnt:631
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coverage: 66.928% pattern: 16 before: 1234 now: 1137
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:323. flip_cnt: 0, stem_cnt: 605, fault_cnt:479
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coverage: 67.423% pattern: 17 before: 1137 now: 1120
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 605, fault_cnt:301
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coverage: 67.685% pattern: 18 before: 1120 now: 1111
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:893. flip_cnt: 0, stem_cnt: 605, fault_cnt:475
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coverage: 69.052% pattern: 19 before: 1111 now: 1064
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:316
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coverage: 69.168% pattern: 20 before: 1064 now: 1060
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:570. flip_cnt: 0, stem_cnt: 605, fault_cnt:424
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coverage: 70.041% pattern: 21 before: 1060 now: 1030
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:494. flip_cnt: 0, stem_cnt: 605, fault_cnt:507
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coverage: 70.797% pattern: 22 before: 1030 now: 1004
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:684. flip_cnt: 0, stem_cnt: 605, fault_cnt:457
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coverage: 71.844% pattern: 23 before: 1004 now: 968
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 605, fault_cnt:421
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coverage: 72.368% pattern: 24 before: 968 now: 950
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:1216. flip_cnt: 0, stem_cnt: 605, fault_cnt:488
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coverage: 74.229% pattern: 25 before: 950 now: 886
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:684. flip_cnt: 0, stem_cnt: 605, fault_cnt:537
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coverage: 75.276% pattern: 26 before: 886 now: 850
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:608. flip_cnt: 0, stem_cnt: 605, fault_cnt:571
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coverage: 76.207% pattern: 27 before: 850 now: 818
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:513. flip_cnt: 0, stem_cnt: 605, fault_cnt:573
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coverage: 76.992% pattern: 28 before: 818 now: 791
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:323. flip_cnt: 0, stem_cnt: 605, fault_cnt:642
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coverage: 77.487% pattern: 29 before: 791 now: 774
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:632
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coverage: 77.778% pattern: 30 before: 774 now: 764
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:418. flip_cnt: 0, stem_cnt: 605, fault_cnt:401
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coverage: 78.418% pattern: 31 before: 764 now: 742
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:445
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coverage: 78.505% pattern: 32 before: 742 now: 739
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:567
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coverage: 78.592% pattern: 33 before: 739 now: 736
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:216
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coverage: 78.738% pattern: 34 before: 736 now: 731
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:513
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coverage: 78.738% pattern: 34 before: 731 now: 731
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:572
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coverage: 78.738% pattern: 34 before: 731 now: 731
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:366
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coverage: 78.738% pattern: 34 before: 731 now: 731
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 605, fault_cnt:480
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coverage: 79.145% pattern: 35 before: 731 now: 717
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 605, fault_cnt:423
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coverage: 79.727% pattern: 36 before: 717 now: 697
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 605, fault_cnt:458
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coverage: 80.076% pattern: 37 before: 697 now: 685
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:341
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coverage: 80.163% pattern: 38 before: 685 now: 682
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 605, fault_cnt:506
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coverage: 80.337% pattern: 39 before: 682 now: 676
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 605, fault_cnt:523
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coverage: 80.890% pattern: 40 before: 676 now: 657
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:361. flip_cnt: 0, stem_cnt: 605, fault_cnt:479
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coverage: 81.443% pattern: 41 before: 657 now: 638
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:469
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coverage: 81.472% pattern: 42 before: 638 now: 637
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:643
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coverage: 81.617% pattern: 43 before: 637 now: 632
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:557
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coverage: 81.617% pattern: 43 before: 632 now: 632
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:455
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coverage: 81.763% pattern: 44 before: 632 now: 627
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:517
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coverage: 81.850% pattern: 45 before: 627 now: 624
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 605, fault_cnt:520
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coverage: 82.083% pattern: 46 before: 624 now: 616
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:396
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coverage: 82.083% pattern: 46 before: 616 now: 616
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:539
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coverage: 82.112% pattern: 47 before: 616 now: 615
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 605, fault_cnt:344
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coverage: 82.315% pattern: 48 before: 615 now: 608
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:478
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coverage: 82.461% pattern: 49 before: 608 now: 603
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:613
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coverage: 82.752% pattern: 50 before: 603 now: 593
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:468
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coverage: 82.752% pattern: 50 before: 593 now: 593
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:454
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coverage: 82.839% pattern: 51 before: 593 now: 590
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:328
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coverage: 82.839% pattern: 51 before: 590 now: 590
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:451
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coverage: 82.839% pattern: 51 before: 590 now: 590
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:402
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coverage: 82.868% pattern: 52 before: 590 now: 589
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:369
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coverage: 82.868% pattern: 52 before: 589 now: 589
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:434
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coverage: 82.868% pattern: 52 before: 589 now: 589
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:539
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coverage: 82.926% pattern: 53 before: 589 now: 587
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:489
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coverage: 82.926% pattern: 53 before: 587 now: 587
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:465
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coverage: 82.926% pattern: 53 before: 587 now: 587
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:367
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coverage: 82.955% pattern: 54 before: 587 now: 586
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:371
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coverage: 83.072% pattern: 55 before: 586 now: 582
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:304. flip_cnt: 0, stem_cnt: 605, fault_cnt:616
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coverage: 83.537% pattern: 56 before: 582 now: 566
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:366
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coverage: 83.566% pattern: 57 before: 566 now: 565
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:241
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coverage: 83.566% pattern: 57 before: 565 now: 565
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:454
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coverage: 83.595% pattern: 58 before: 565 now: 564
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:394
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coverage: 83.595% pattern: 58 before: 564 now: 564
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:469
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coverage: 83.595% pattern: 58 before: 564 now: 564
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:266. flip_cnt: 0, stem_cnt: 605, fault_cnt:442
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coverage: 84.002% pattern: 59 before: 564 now: 550
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:510
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coverage: 84.002% pattern: 59 before: 550 now: 550
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:447
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coverage: 84.002% pattern: 59 before: 550 now: 550
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 605, fault_cnt:503
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coverage: 84.264% pattern: 60 before: 550 now: 541
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:191
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coverage: 84.264% pattern: 60 before: 541 now: 541
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:337
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coverage: 84.264% pattern: 60 before: 541 now: 541
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:532. flip_cnt: 0, stem_cnt: 605, fault_cnt:413
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coverage: 85.079% pattern: 61 before: 541 now: 513
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:569
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coverage: 85.195% pattern: 62 before: 513 now: 509
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:529
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coverage: 85.224% pattern: 63 before: 509 now: 508
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:293
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coverage: 85.224% pattern: 63 before: 508 now: 508
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:306
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coverage: 85.224% pattern: 63 before: 508 now: 508
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:516
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coverage: 85.282% pattern: 64 before: 508 now: 506
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:290
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coverage: 85.311% pattern: 65 before: 506 now: 505
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:451
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coverage: 85.311% pattern: 65 before: 505 now: 505
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:532
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coverage: 85.311% pattern: 65 before: 505 now: 505
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:309
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coverage: 85.311% pattern: 65 before: 505 now: 505
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:480
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coverage: 85.311% pattern: 65 before: 505 now: 505
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:333
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coverage: 85.340% pattern: 66 before: 505 now: 504
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 605, fault_cnt:507
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coverage: 85.573% pattern: 67 before: 504 now: 496
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:423
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coverage: 85.573% pattern: 67 before: 496 now: 496
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:429
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coverage: 85.573% pattern: 67 before: 496 now: 496
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:483
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coverage: 85.573% pattern: 67 before: 496 now: 496
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:551
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coverage: 85.718% pattern: 68 before: 496 now: 491
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:425
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coverage: 85.748% pattern: 69 before: 491 now: 490
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:285
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coverage: 85.748% pattern: 69 before: 490 now: 490
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 605, fault_cnt:385
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coverage: 86.009% pattern: 70 before: 490 now: 481
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:415
|
||
coverage: 86.009% pattern: 70 before: 481 now: 481
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:288
|
||
coverage: 86.009% pattern: 70 before: 481 now: 481
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:490
|
||
coverage: 86.097% pattern: 71 before: 481 now: 478
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 605, fault_cnt:396
|
||
coverage: 86.678% pattern: 72 before: 478 now: 458
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:467
|
||
coverage: 86.678% pattern: 72 before: 458 now: 458
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:451
|
||
coverage: 86.969% pattern: 73 before: 458 now: 448
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:387
|
||
coverage: 86.969% pattern: 73 before: 448 now: 448
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:127
|
||
coverage: 86.969% pattern: 73 before: 448 now: 448
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:453
|
||
coverage: 86.998% pattern: 74 before: 448 now: 447
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:591
|
||
coverage: 86.998% pattern: 74 before: 447 now: 447
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:481
|
||
coverage: 86.998% pattern: 74 before: 447 now: 447
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:544
|
||
coverage: 86.998% pattern: 74 before: 447 now: 447
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:450
|
||
coverage: 86.998% pattern: 74 before: 447 now: 447
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 605, fault_cnt:307
|
||
coverage: 87.260% pattern: 75 before: 447 now: 438
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:508
|
||
coverage: 87.289% pattern: 76 before: 438 now: 437
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:572
|
||
coverage: 87.289% pattern: 76 before: 437 now: 437
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:404
|
||
coverage: 87.289% pattern: 76 before: 437 now: 437
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:565
|
||
coverage: 87.289% pattern: 76 before: 437 now: 437
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:387
|
||
coverage: 87.405% pattern: 77 before: 437 now: 433
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:604
|
||
coverage: 87.405% pattern: 77 before: 433 now: 433
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:567
|
||
coverage: 87.405% pattern: 77 before: 433 now: 433
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:602
|
||
coverage: 87.522% pattern: 78 before: 433 now: 429
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:522
|
||
coverage: 87.522% pattern: 78 before: 429 now: 429
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:400
|
||
coverage: 87.522% pattern: 78 before: 429 now: 429
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:537
|
||
coverage: 87.522% pattern: 78 before: 429 now: 429
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:551
|
||
coverage: 87.522% pattern: 78 before: 429 now: 429
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:383
|
||
coverage: 87.580% pattern: 79 before: 429 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:473
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:336
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:512
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:432
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:499
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:475
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:257
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:239
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:526
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:377
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:495
|
||
coverage: 87.580% pattern: 79 before: 427 now: 427
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:520
|
||
coverage: 87.638% pattern: 80 before: 427 now: 425
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:133. flip_cnt: 0, stem_cnt: 605, fault_cnt:529
|
||
coverage: 87.842% pattern: 81 before: 425 now: 418
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:318
|
||
coverage: 87.842% pattern: 81 before: 418 now: 418
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:370
|
||
coverage: 87.842% pattern: 81 before: 418 now: 418
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:334
|
||
coverage: 87.842% pattern: 81 before: 418 now: 418
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:484
|
||
coverage: 87.842% pattern: 81 before: 418 now: 418
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:228
|
||
coverage: 87.842% pattern: 81 before: 418 now: 418
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:510
|
||
coverage: 87.842% pattern: 81 before: 418 now: 418
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:292
|
||
coverage: 87.842% pattern: 81 before: 418 now: 418
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:228. flip_cnt: 0, stem_cnt: 605, fault_cnt:586
|
||
coverage: 88.191% pattern: 82 before: 418 now: 406
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:341
|
||
coverage: 88.191% pattern: 82 before: 406 now: 406
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:315
|
||
coverage: 88.191% pattern: 82 before: 406 now: 406
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:451
|
||
coverage: 88.191% pattern: 82 before: 406 now: 406
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:95. flip_cnt: 0, stem_cnt: 605, fault_cnt:393
|
||
coverage: 88.336% pattern: 83 before: 406 now: 401
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:483
|
||
coverage: 88.336% pattern: 83 before: 401 now: 401
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 605, fault_cnt:602
|
||
coverage: 88.598% pattern: 84 before: 401 now: 392
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:308
|
||
coverage: 88.598% pattern: 84 before: 392 now: 392
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:552
|
||
coverage: 88.598% pattern: 84 before: 392 now: 392
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:427
|
||
coverage: 88.598% pattern: 84 before: 392 now: 392
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:392
|
||
coverage: 88.627% pattern: 85 before: 392 now: 391
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:436
|
||
coverage: 88.627% pattern: 85 before: 391 now: 391
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:576
|
||
coverage: 88.627% pattern: 85 before: 391 now: 391
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:523
|
||
coverage: 88.627% pattern: 85 before: 391 now: 391
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:518
|
||
coverage: 88.627% pattern: 85 before: 391 now: 391
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:558
|
||
coverage: 88.627% pattern: 85 before: 391 now: 391
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:459
|
||
coverage: 88.656% pattern: 86 before: 391 now: 390
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:401
|
||
coverage: 88.656% pattern: 86 before: 390 now: 390
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:488
|
||
coverage: 88.656% pattern: 86 before: 390 now: 390
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:369
|
||
coverage: 88.656% pattern: 86 before: 390 now: 390
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:253
|
||
coverage: 88.656% pattern: 86 before: 390 now: 390
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:530
|
||
coverage: 88.656% pattern: 86 before: 390 now: 390
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:559
|
||
coverage: 88.656% pattern: 86 before: 390 now: 390
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:499
|
||
coverage: 88.656% pattern: 86 before: 390 now: 390
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:236
|
||
coverage: 88.656% pattern: 86 before: 390 now: 390
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:634
|
||
coverage: 88.714% pattern: 87 before: 390 now: 388
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:478
|
||
coverage: 88.714% pattern: 87 before: 388 now: 388
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:269
|
||
coverage: 88.714% pattern: 87 before: 388 now: 388
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 605, fault_cnt:519
|
||
coverage: 89.005% pattern: 88 before: 388 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:484
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:461
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:447
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:461
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:504
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:488
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:314
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:460
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:285
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:473
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:626
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:495
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:600
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:520
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:595
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:464
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:460
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:272
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:459
|
||
coverage: 89.005% pattern: 88 before: 378 now: 378
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:342. flip_cnt: 0, stem_cnt: 605, fault_cnt:416
|
||
coverage: 89.529% pattern: 89 before: 378 now: 360
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:578
|
||
coverage: 89.587% pattern: 90 before: 360 now: 358
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:423
|
||
coverage: 89.616% pattern: 91 before: 358 now: 357
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:443
|
||
coverage: 89.616% pattern: 91 before: 357 now: 357
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:377
|
||
coverage: 89.616% pattern: 91 before: 357 now: 357
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 605, fault_cnt:342
|
||
coverage: 89.732% pattern: 92 before: 357 now: 353
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:249
|
||
coverage: 89.732% pattern: 92 before: 353 now: 353
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:343
|
||
coverage: 89.732% pattern: 92 before: 353 now: 353
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:508
|
||
coverage: 89.732% pattern: 92 before: 353 now: 353
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 605, fault_cnt:486
|
||
coverage: 89.791% pattern: 93 before: 353 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:477
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:359
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:279
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:502
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:539
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:562
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:452
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:516
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:463
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:423
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:532
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:269
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:499
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:474
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:360
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:283
|
||
coverage: 89.791% pattern: 93 before: 351 now: 351
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 605, fault_cnt:313
|
||
coverage: 89.820% pattern: 94 before: 351 now: 350
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:507
|
||
coverage: 89.820% pattern: 94 before: 350 now: 350
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 605, fault_cnt:430
|
||
coverage: 90.081% pattern: 95 before: 350 now: 341
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:374
|
||
coverage: 90.081% pattern: 95 before: 341 now: 341
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:487
|
||
coverage: 90.081% pattern: 95 before: 341 now: 341
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:522
|
||
coverage: 90.081% pattern: 95 before: 341 now: 341
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 605, fault_cnt:395
|
||
coverage: 90.169% pattern: 96 before: 341 now: 338
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:377
|
||
coverage: 90.169% pattern: 96 before: 338 now: 338
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:293
|
||
coverage: 90.169% pattern: 96 before: 338 now: 338
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 605, fault_cnt:545
|
||
coverage: 90.169% pattern: 96 before: 338 now: 338
|
||
checking valid circuit ... result: 1.
|