500 lines
26 KiB
Plaintext
500 lines
26 KiB
Plaintext
[H[2Jmake: 'atpg' is up to date.
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========================
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parsing file ./benchmark/c6288.bench ... Done.
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====== Circuit Statistics ======
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PI: 32
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PO: 32
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Gate: 2448
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Stem: 1488
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Level: 7
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================================
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[SOL] flip: 0, stem: 0, fault:41770. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2199
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coverage: 44.914% pattern: 1 before: 4896 now: 2697
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:17100. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2196
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coverage: 63.297% pattern: 2 before: 2697 now: 1797
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:12844. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2205
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coverage: 77.104% pattern: 3 before: 1797 now: 1121
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:7239. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2201
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coverage: 84.886% pattern: 4 before: 1121 now: 740
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:4275. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2202
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coverage: 89.481% pattern: 5 before: 740 now: 515
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:2660. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2187
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coverage: 92.341% pattern: 6 before: 515 now: 375
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:1634. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
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coverage: 94.097% pattern: 7 before: 375 now: 289
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:1121. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192
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coverage: 95.302% pattern: 8 before: 289 now: 230
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:665. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2201
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coverage: 96.017% pattern: 9 before: 230 now: 195
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:950. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2197
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coverage: 97.038% pattern: 10 before: 195 now: 145
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:380. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2167
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coverage: 97.447% pattern: 11 before: 145 now: 125
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:399. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191
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coverage: 97.876% pattern: 12 before: 125 now: 104
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2207
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coverage: 98.080% pattern: 13 before: 104 now: 94
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:190. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2208
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coverage: 98.284% pattern: 14 before: 94 now: 84
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194
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coverage: 98.366% pattern: 15 before: 84 now: 80
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:152. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2173
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coverage: 98.529% pattern: 16 before: 80 now: 72
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:209. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2185
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coverage: 98.754% pattern: 17 before: 72 now: 61
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
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coverage: 98.775% pattern: 18 before: 61 now: 60
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:171. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190
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coverage: 98.958% pattern: 19 before: 60 now: 51
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:76. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2188
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coverage: 99.040% pattern: 20 before: 51 now: 47
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:114. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194
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coverage: 99.163% pattern: 21 before: 47 now: 41
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:57. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2185
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coverage: 99.224% pattern: 22 before: 41 now: 38
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2188
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coverage: 99.265% pattern: 23 before: 38 now: 36
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2206
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coverage: 99.265% pattern: 23 before: 36 now: 36
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2204
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coverage: 99.265% pattern: 23 before: 36 now: 36
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2212
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coverage: 99.285% pattern: 24 before: 36 now: 35
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203
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coverage: 99.326% pattern: 25 before: 35 now: 33
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
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coverage: 99.367% pattern: 26 before: 33 now: 31
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2177
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coverage: 99.387% pattern: 27 before: 31 now: 30
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2180
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coverage: 99.387% pattern: 27 before: 30 now: 30
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2235
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coverage: 99.408% pattern: 28 before: 30 now: 29
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2202
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coverage: 99.408% pattern: 28 before: 29 now: 29
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2184
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coverage: 99.428% pattern: 29 before: 29 now: 28
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
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coverage: 99.449% pattern: 30 before: 28 now: 27
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
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coverage: 99.449% pattern: 30 before: 27 now: 27
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
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coverage: 99.449% pattern: 30 before: 27 now: 27
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
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coverage: 99.449% pattern: 30 before: 27 now: 27
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2207
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coverage: 99.489% pattern: 31 before: 27 now: 25
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
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coverage: 99.530% pattern: 32 before: 25 now: 23
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2185
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coverage: 99.551% pattern: 33 before: 23 now: 22
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
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coverage: 99.551% pattern: 33 before: 22 now: 22
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2182
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coverage: 99.571% pattern: 34 before: 22 now: 21
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2185
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coverage: 99.571% pattern: 34 before: 21 now: 21
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2233
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coverage: 99.571% pattern: 34 before: 21 now: 21
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2188
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coverage: 99.571% pattern: 34 before: 21 now: 21
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2177
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coverage: 99.571% pattern: 34 before: 21 now: 21
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2198
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coverage: 99.571% pattern: 34 before: 21 now: 21
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194
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coverage: 99.571% pattern: 34 before: 21 now: 21
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2197
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coverage: 99.571% pattern: 34 before: 21 now: 21
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2179
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coverage: 99.592% pattern: 35 before: 21 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2223
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2187
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2208
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2183
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2202
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2183
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2196
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2162
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2198
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2187
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2199
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2212
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2209
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2210
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coverage: 99.592% pattern: 35 before: 20 now: 20
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:19. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2231
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coverage: 99.612% pattern: 36 before: 20 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2215
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2199
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2196
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2197
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2193
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2197
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2186
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191
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coverage: 99.612% pattern: 36 before: 19 now: 19
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:38. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2180
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coverage: 99.653% pattern: 37 before: 19 now: 17
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checking valid circuit ... result: 1.
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[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2200
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coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2186
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2209
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2196
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2179
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2180
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2183
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2186
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2182
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2184
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2177
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2180
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2185
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2172
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2183
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2188
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2193
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2184
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2179
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2213
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2174
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2179
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2174
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2199
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2183
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2224
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2187
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2201
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2179
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2198
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2195
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2191
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2201
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2194
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2192
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2186
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2188
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2201
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2204
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2216
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2202
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2203
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2174
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2189
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2186
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2170
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2181
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|
||
[SOL] flip: 0, stem: 0, fault:0. flip_cnt: 0, stem_cnt: 1488, fault_cnt:2190
|
||
coverage: 99.653% pattern: 37 before: 17 now: 17
|
||
checking valid circuit ... result: 1.
|